[llvm] r294598 - [X86][BMI2] Regenerate mulx tests

[Simon Pilgrim via llvm-commits]

Author: rksimon
Date: Thu Feb  9 11:54:51 2017
New Revision: 294598

URL: http://llvm.org/viewvc/llvm-project?rev=294598&view=rev
Log:
[X86][BMI2] Regenerate mulx tests

Modified:
    llvm/trunk/test/CodeGen/X86/mulx32.ll
    llvm/trunk/test/CodeGen/X86/mulx64.ll

Modified: llvm/trunk/test/CodeGen/X86/mulx32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mulx32.ll?rev=294598&r1=294597&r2=294598&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mulx32.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mulx32.ll Thu Feb  9 11:54:51 2017
@@ -1,22 +1,29 @@
-; RUN: llc -mcpu=core-avx2 -march=x86 < %s | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=i686-unknown -mattr=+bmi2 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-unknown -mcpu=core-avx2 | FileCheck %s
 
 define i64 @f1(i32 %a, i32 %b) {
+; CHECK-LABEL: f1:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %edx
+; CHECK-NEXT:    mulxl {{[0-9]+}}(%esp), %eax, %edx
+; CHECK-NEXT:    retl
   %x = zext i32 %a to i64
   %y = zext i32 %b to i64
   %r = mul i64 %x, %y
-; CHECK: f1
-; CHECK: mulxl
-; CHECK: ret
   ret i64 %r
 }
 
 define i64 @f2(i32 %a, i32* %p) {
+; CHECK-LABEL: f2:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %edx
+; CHECK-NEXT:    mulxl (%eax), %eax, %edx
+; CHECK-NEXT:    retl
   %b = load i32, i32* %p
   %x = zext i32 %a to i64
   %y = zext i32 %b to i64
   %r = mul i64 %x, %y
-; CHECK: f2
-; CHECK: mulxl ({{.+}}), %{{.+}}, %{{.+}}
-; CHECK: ret
   ret i64 %r
 }

Modified: llvm/trunk/test/CodeGen/X86/mulx64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mulx64.ll?rev=294598&r1=294597&r2=294598&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mulx64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mulx64.ll Thu Feb  9 11:54:51 2017
@@ -1,22 +1,28 @@
-; RUN: llc -mcpu=core-avx2 -march=x86-64 < %s | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+bmi2 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=core-avx2 | FileCheck %s
 
 define i128 @f1(i64 %a, i64 %b) {
+; CHECK-LABEL: f1:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    movq %rdi, %rdx
+; CHECK-NEXT:    mulxq %rsi, %rax, %rdx
+; CHECK-NEXT:    retq
   %x = zext i64 %a to i128
   %y = zext i64 %b to i128
   %r = mul i128 %x, %y
-; CHECK: f1
-; CHECK: mulxq
-; CHECK: ret
   ret i128 %r
 }
 
 define i128 @f2(i64 %a, i64* %p) {
+; CHECK-LABEL: f2:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    movq %rdi, %rdx
+; CHECK-NEXT:    mulxq (%rsi), %rax, %rdx
+; CHECK-NEXT:    retq
   %b = load i64, i64* %p
   %x = zext i64 %a to i128
   %y = zext i64 %b to i128
   %r = mul i128 %x, %y
-; CHECK: f2
-; CHECK: mulxq ({{.+}}), %{{.+}}, %{{.+}}
-; CHECK: ret
   ret i128 %r
 }