[llvm] r294596 - [X86][MMX] Remove the (long time) unused MMX_PINSRW ISD opcode.
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 9 09:08:48 PST 2017
Author: rksimon
Date: Thu Feb 9 11:08:47 2017
New Revision: 294596
URL: http://llvm.org/viewvc/llvm-project?rev=294596&view=rev
Log:
[X86][MMX] Remove the (long time) unused MMX_PINSRW ISD opcode.
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
llvm/trunk/lib/Target/X86/X86ISelLowering.h
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=294596&r1=294595&r2=294596&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Feb 9 11:08:47 2017
@@ -23800,7 +23800,6 @@ const char *X86TargetLowering::getTarget
case X86ISD::INSERTPS: return "X86ISD::INSERTPS";
case X86ISD::PINSRB: return "X86ISD::PINSRB";
case X86ISD::PINSRW: return "X86ISD::PINSRW";
- case X86ISD::MMX_PINSRW: return "X86ISD::MMX_PINSRW";
case X86ISD::PSHUFB: return "X86ISD::PSHUFB";
case X86ISD::ANDNP: return "X86ISD::ANDNP";
case X86ISD::BLENDI: return "X86ISD::BLENDI";
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=294596&r1=294595&r2=294596&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Thu Feb 9 11:08:47 2017
@@ -179,7 +179,7 @@ namespace llvm {
/// Insert the lower 16-bits of a 32-bit value to a vector,
/// corresponds to X86::PINSRW.
- PINSRW, MMX_PINSRW,
+ PINSRW,
/// Shuffle 16 8-bit values within a vector.
PSHUFB,
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