[PATCH] D29763: Tighten ARMConstantInslands pass for Thumb-1 targets

[Asiri Rathnayake via Phabricator via llvm-commits]

rmaprath created this revision.
Herald added subscribers: rengolin, aemerson.

This pass takes blocks of the form:

  %R0<def>, %CPSR<def,dead> = tLSLri %R0<kill>, 2
  %R1<def> = tLEApcrelJT <jt#0>
  %R0<def> = tLDRr %R0<kill>, %R1<kill>
  tBR_JTr %R0<kill>, <jt#0>

And turns them into:

  tTBB_JT %PC, %R0<kill>, <jt#0>, 0
  JUMPTABLE_TBB 0, <jt#0>, <some-calculated-offset>

However, this assumes that R0 (index register) is not written to between
the `tLDRr` and the `tBR_JTr` instructions. This patch tightens the pass so
that when such an intervening instruction is present, the input block is
left un-altered.


https://reviews.llvm.org/D29763

Files:
  lib/Target/ARM/ARMConstantIslandPass.cpp
  test/CodeGen/Thumb/no-cp-islands-opt.mir

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