[llvm] r294561 - [X86] Remove INVPCID and SMAP feature flags. They aren't currently used by any instructions and not tested.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Wed Feb 8 22:50:59 PST 2017
Author: ctopper
Date: Thu Feb 9 00:50:59 2017
New Revision: 294561
URL: http://llvm.org/viewvc/llvm-project?rev=294561&view=rev
Log:
[X86] Remove INVPCID and SMAP feature flags. They aren't currently used by any instructions and not tested.
If we implement intrinsics for their instructions in the future, the feature flags can be added back with proper testing.
Modified:
llvm/trunk/lib/Support/Host.cpp
llvm/trunk/lib/Target/X86/X86.td
llvm/trunk/lib/Target/X86/X86Subtarget.h
Modified: llvm/trunk/lib/Support/Host.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Host.cpp?rev=294561&r1=294560&r2=294561&view=diff
==============================================================================
--- llvm/trunk/lib/Support/Host.cpp (original)
+++ llvm/trunk/lib/Support/Host.cpp Thu Feb 9 00:50:59 2017
@@ -1368,11 +1368,9 @@ bool sys::getHostCPUFeatures(StringMap<b
Features["bmi"] = HasLeaf7 && ((EBX >> 3) & 1);
Features["hle"] = HasLeaf7 && ((EBX >> 4) & 1);
Features["bmi2"] = HasLeaf7 && ((EBX >> 8) & 1);
- Features["invpcid"] = HasLeaf7 && ((EBX >> 10) & 1);
Features["rtm"] = HasLeaf7 && ((EBX >> 11) & 1);
Features["rdseed"] = HasLeaf7 && ((EBX >> 18) & 1);
Features["adx"] = HasLeaf7 && ((EBX >> 19) & 1);
- Features["smap"] = HasLeaf7 && ((EBX >> 20) & 1);
Features["clflushopt"] = HasLeaf7 && ((EBX >> 23) & 1);
Features["clwb"] = HasLeaf7 && ((EBX >> 24) & 1);
Features["sha"] = HasLeaf7 && ((EBX >> 29) & 1);
Modified: llvm/trunk/lib/Target/X86/X86.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86.td?rev=294561&r1=294560&r2=294561&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86.td (original)
+++ llvm/trunk/lib/Target/X86/X86.td Thu Feb 9 00:50:59 2017
@@ -217,10 +217,6 @@ def FeatureSlowDivide64 : SubtargetFeatu
def FeaturePadShortFunctions : SubtargetFeature<"pad-short-functions",
"PadShortFunctions", "true",
"Pad short functions">;
-def FeatureINVPCID : SubtargetFeature<"invpcid", "HasInvPCId", "true",
- "Invalidate Process-Context Identifier">;
-def FeatureSMAP : SubtargetFeature<"smap", "HasSMAP", "true",
- "Supervisor Mode Access Protection">;
def FeatureSGX : SubtargetFeature<"sgx", "HasSGX", "true",
"Enable Software Guard Extensions">;
def FeatureCLFLUSHOPT : SubtargetFeature<"clflushopt", "HasCLFLUSHOPT", "true",
@@ -496,7 +492,6 @@ def HSWFeatures : ProcessorFeatures<IVBF
FeatureFMA,
FeatureLZCNT,
FeatureMOVBE,
- FeatureINVPCID,
FeatureRTM,
FeatureHLE,
FeatureSlowIncDec
@@ -509,8 +504,7 @@ def : HaswellProc<"core-avx2">; // Legac
def BDWFeatures : ProcessorFeatures<HSWFeatures.Value, [
FeatureADX,
- FeatureRDSEED,
- FeatureSMAP
+ FeatureRDSEED
]>;
class BroadwellProc<string Name> : ProcModel<Name, HaswellModel,
BDWFeatures.Value, []>;
@@ -785,7 +779,6 @@ def: ProcessorModel<"znver1", BtVer2Mode
FeatureRDRAND,
FeatureRDSEED,
FeatureSHA,
- FeatureSMAP,
FeatureSSE4A,
FeatureSlowSHLD,
FeatureX87,
Modified: llvm/trunk/lib/Target/X86/X86Subtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Subtarget.h?rev=294561&r1=294560&r2=294561&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86Subtarget.h (original)
+++ llvm/trunk/lib/Target/X86/X86Subtarget.h Thu Feb 9 00:50:59 2017
@@ -274,12 +274,6 @@ protected:
/// Processor supports MPX - Memory Protection Extensions
bool HasMPX;
- /// Processor supports Invalidate Process-Context Identifier
- bool HasInvPCId;
-
- /// Processor has Supervisor Mode Access Protection
- bool HasSMAP;
-
/// Processor has Software Guard Extensions
bool HasSGX;
More information about the llvm-commits
mailing list