[llvm] r294531 - GlobalISel: legalize G_FPOW to a libcall on AArch64.

[Tim Northover via llvm-commits]

Author: tnorthover
Date: Wed Feb  8 17:23:39 2017
New Revision: 294531

URL: http://llvm.org/viewvc/llvm-project?rev=294531&view=rev
Log:
GlobalISel: legalize G_FPOW to a libcall on AArch64.

There's no instruction to implement it.

Added:
    llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-pow.mir
Modified:
    llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    llvm/trunk/lib/Target/AArch64/AArch64LegalizerInfo.cpp

Modified: llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp?rev=294531&r1=294530&r2=294531&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp (original)
+++ llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp Wed Feb  8 17:23:39 2017
@@ -92,6 +92,16 @@ void LegalizerHelper::extractParts(unsig
   MIRBuilder.buildExtract(VRegs, Indexes, Reg);
 }
 
+static RTLIB::Libcall getRTLibDesc(unsigned Opcode, unsigned Size) {
+  switch (Opcode) {
+  case TargetOpcode::G_FREM:
+    return Size == 64 ? RTLIB::REM_F64 : RTLIB::REM_F32;
+  case TargetOpcode::G_FPOW:
+    return Size == 64 ? RTLIB::POW_F64 : RTLIB::POW_F32;
+  }
+  llvm_unreachable("Unknown libcall function");
+}
+
 LegalizerHelper::LegalizeResult
 LegalizerHelper::libcall(MachineInstr &MI) {
   LLT Ty = MRI.getType(MI.getOperand(0).getReg());
@@ -101,14 +111,13 @@ LegalizerHelper::libcall(MachineInstr &M
   switch (MI.getOpcode()) {
   default:
     return UnableToLegalize;
+  case TargetOpcode::G_FPOW:
   case TargetOpcode::G_FREM: {
     auto &Ctx = MIRBuilder.getMF().getFunction()->getContext();
     Type *Ty = Size == 64 ? Type::getDoubleTy(Ctx) : Type::getFloatTy(Ctx);
     auto &CLI = *MIRBuilder.getMF().getSubtarget().getCallLowering();
     auto &TLI = *MIRBuilder.getMF().getSubtarget().getTargetLowering();
-    const char *Name =
-        TLI.getLibcallName(Size == 64 ? RTLIB::REM_F64 : RTLIB::REM_F32);
-
+    const char *Name = TLI.getLibcallName(getRTLibDesc(MI.getOpcode(), Size));
     CLI.lowerCall(
         MIRBuilder, MachineOperand::CreateES(Name),
         {MI.getOperand(0).getReg(), Ty},

Modified: llvm/trunk/lib/Target/AArch64/AArch64LegalizerInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64LegalizerInfo.cpp?rev=294531&r1=294530&r2=294531&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64LegalizerInfo.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64LegalizerInfo.cpp Wed Feb  8 17:23:39 2017
@@ -78,8 +78,10 @@ AArch64LegalizerInfo::AArch64LegalizerIn
     for (auto Ty : {s32, s64})
       setAction({BinOp, Ty}, Legal);
 
-  setAction({G_FREM, s32}, Libcall);
-  setAction({G_FREM, s64}, Libcall);
+  for (unsigned BinOp : {G_FREM, G_FPOW}) {
+    setAction({BinOp, s32}, Libcall);
+    setAction({BinOp, s64}, Libcall);
+  }
 
   // FIXME: what should we do about G_INSERTs with more than one source value?
   // For now the default of not specifying means we'll fall back.

Added: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-pow.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-pow.mir?rev=294531&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-pow.mir (added)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-pow.mir Wed Feb  8 17:23:39 2017
@@ -0,0 +1,35 @@
+# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
+
+--- |
+  target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
+  target triple = "aarch64--"
+  define void @test_pow() {
+  entry:
+    ret void
+  }
+...
+
+---
+name:            test_pow
+body: |
+  bb.0.entry:
+    liveins: %d0, %d1, %s2, %s3
+
+    %0:_(s64) = COPY %d0
+    %1:_(s64) = COPY %d1
+    %2:_(s32) = COPY %s2
+    %3:_(s32) = COPY %s3
+
+    ; CHECK: %d0 = COPY %0
+    ; CHECK: %d1 = COPY %1
+    ; CHECK: BL $pow, csr_aarch64_aapcs, implicit-def %lr, implicit %sp, implicit %d0, implicit %d1, implicit-def %d0
+    ; CHECK: %4(s64) = COPY %d0
+    %4:_(s64) = G_FPOW %0, %1
+
+    ; CHECK: %s0 = COPY %2
+    ; CHECK: %s1 = COPY %3
+    ; CHECK: BL $powf, csr_aarch64_aapcs, implicit-def %lr, implicit %sp, implicit %s0, implicit %s1, implicit-def %s0
+    ; CHECK: %5(s32) = COPY %s0
+    %5:_(s32) = G_FPOW %2, %3
+
+...