[PATCH] D29690: [AVX512] Improve EXTRACT_VECTOR_ELT with variable index.
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Feb 8 08:59:02 PST 2017
RKSimon added a comment.
Add the new tests to trunk now to show current codegen?
================
Comment at: lib/Target/X86/X86ISelLowering.cpp:13698
+ SmallVector<SDValue, 8> Ops;
+ Ops.append(NumElts, DAG.getConstant(0, dl, MaskEltVT));
+ Ops[0] = Idx;
----------------
SmallVector<SDValue, 8> Ops(NumElts, DAG.getConstant(0, dl, MaskEltVT));
================
Comment at: lib/Target/X86/X86ISelLowering.cpp:26982
if (UnaryShuffle && (Depth >= 3 || HasVariableMask) && !MaskContainsZeros &&
- ((Subtarget.hasAVX2() &&
- (MaskVT == MVT::v8f32 || MaskVT == MVT::v8i32)) ||
- (Subtarget.hasAVX512() &&
- (MaskVT == MVT::v8f64 || MaskVT == MVT::v8i64 ||
- MaskVT == MVT::v16f32 || MaskVT == MVT::v16i32)) ||
- (Subtarget.hasBWI() && MaskVT == MVT::v32i16) ||
- (Subtarget.hasBWI() && Subtarget.hasVLX() && MaskVT == MVT::v16i16) ||
- (Subtarget.hasVBMI() && MaskVT == MVT::v64i8) ||
- (Subtarget.hasVBMI() && Subtarget.hasVLX() && MaskVT == MVT::v32i8))) {
+ isVPERMVsupported(MaskVT, Subtarget)) {
MVT VPermMaskSVT = MVT::getIntegerVT(MaskEltSizeInBits);
----------------
Haven't you've lost the hasVLX() check by using isVPERMVsupported?
Repository:
rL LLVM
https://reviews.llvm.org/D29690
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