[llvm] r294405 - [X86] Remove PCOMMIT instruction support since Intel has deprecated this instruction with no plans to release products with it.
Davide Italiano via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 7 21:58:32 PST 2017
On Tue, Feb 7, 2017 at 9:45 PM, Craig Topper via llvm-commits
<llvm-commits at lists.llvm.org> wrote:
> Author: ctopper
> Date: Tue Feb 7 23:45:39 2017
> New Revision: 294405
>
> URL: http://llvm.org/viewvc/llvm-project?rev=294405&view=rev
> Log:
> [X86] Remove PCOMMIT instruction support since Intel has deprecated this instruction with no plans to release products with it.
>
> Intel's documentation for the deprecation https://software.intel.com/en-us/blogs/2016/09/12/deprecate-pcommit-instruction
>
The changes to test/Transforms/LoopVectorize/X86/int128_no_gather.ll
are unrelated, I think?
> Modified:
> llvm/trunk/lib/Support/Host.cpp
> llvm/trunk/lib/Target/X86/X86.td
> llvm/trunk/lib/Target/X86/X86InstrInfo.td
> llvm/trunk/lib/Target/X86/X86Subtarget.h
> llvm/trunk/test/MC/Disassembler/X86/x86-32.txt
> llvm/trunk/test/MC/X86/x86-32-coverage.s
> llvm/trunk/test/Transforms/LoopVectorize/X86/int128_no_gather.ll
>
> Modified: llvm/trunk/lib/Support/Host.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Host.cpp?rev=294405&r1=294404&r2=294405&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Support/Host.cpp (original)
> +++ llvm/trunk/lib/Support/Host.cpp Tue Feb 7 23:45:39 2017
> @@ -1369,7 +1369,6 @@ bool sys::getHostCPUFeatures(StringMap<b
> Features["rdseed"] = HasLeaf7 && ((EBX >> 18) & 1);
> Features["adx"] = HasLeaf7 && ((EBX >> 19) & 1);
> Features["smap"] = HasLeaf7 && ((EBX >> 20) & 1);
> - Features["pcommit"] = HasLeaf7 && ((EBX >> 22) & 1);
> Features["clflushopt"] = HasLeaf7 && ((EBX >> 23) & 1);
> Features["clwb"] = HasLeaf7 && ((EBX >> 24) & 1);
> Features["sha"] = HasLeaf7 && ((EBX >> 29) & 1);
>
> Modified: llvm/trunk/lib/Target/X86/X86.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86.td?rev=294405&r1=294404&r2=294405&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86.td (original)
> +++ llvm/trunk/lib/Target/X86/X86.td Tue Feb 7 23:45:39 2017
> @@ -225,8 +225,6 @@ def FeatureSGX : SubtargetFeature<"s
> "Enable Software Guard Extensions">;
> def FeatureCLFLUSHOPT : SubtargetFeature<"clflushopt", "HasCLFLUSHOPT", "true",
> "Flush A Cache Line Optimized">;
> -def FeaturePCOMMIT : SubtargetFeature<"pcommit", "HasPCOMMIT", "true",
> - "Enable Persistent Commit">;
> def FeatureCLWB : SubtargetFeature<"clwb", "HasCLWB", "true",
> "Cache Line Write Back">;
> // TODO: This feature ought to be renamed.
> @@ -558,7 +556,6 @@ def SKXFeatures : ProcessorFeatures<SKLF
> FeatureBWI,
> FeatureVLX,
> FeaturePKU,
> - FeaturePCOMMIT,
> FeatureCLWB
> ]>;
>
>
> Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=294405&r1=294404&r2=294405&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
> +++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Tue Feb 7 23:45:39 2017
> @@ -2532,7 +2532,6 @@ let Predicates = [HasTBM] in {
> def CLFLUSHOPT : I<0xAE, MRM7m, (outs), (ins i8mem:$src),
> "clflushopt\t$src", [(int_x86_clflushopt addr:$src)]>, PD;
> def CLWB : I<0xAE, MRM6m, (outs), (ins i8mem:$src), "clwb\t$src", []>, PD;
> -def PCOMMIT : I<0xAE, MRM_F8, (outs), (ins), "pcommit", []>, PD;
>
>
> //===----------------------------------------------------------------------===//
>
> Modified: llvm/trunk/lib/Target/X86/X86Subtarget.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Subtarget.h?rev=294405&r1=294404&r2=294405&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86Subtarget.h (original)
> +++ llvm/trunk/lib/Target/X86/X86Subtarget.h Tue Feb 7 23:45:39 2017
> @@ -286,9 +286,6 @@ protected:
> /// Processor supports Flush Cache Line instruction
> bool HasCLFLUSHOPT;
>
> - /// Processor has Persistent Commit feature
> - bool HasPCOMMIT;
> -
> /// Processor supports Cache Line Write Back instruction
> bool HasCLWB;
>
>
> Modified: llvm/trunk/test/MC/Disassembler/X86/x86-32.txt
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/X86/x86-32.txt?rev=294405&r1=294404&r2=294405&view=diff
> ==============================================================================
> --- llvm/trunk/test/MC/Disassembler/X86/x86-32.txt (original)
> +++ llvm/trunk/test/MC/Disassembler/X86/x86-32.txt Tue Feb 7 23:45:39 2017
> @@ -517,9 +517,6 @@
> # CHECK: clwb (%eax)
> 0x66 0x0f 0xae 0x30
>
> -# CHECK: pcommit
> -0x66 0x0f 0xae 0xf8
> -
> # CHECK: vcvtph2ps %xmm0, %xmm0
> 0xc4 0xe2 0x79 0x13 0xc0
>
>
> Modified: llvm/trunk/test/MC/X86/x86-32-coverage.s
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86-32-coverage.s?rev=294405&r1=294404&r2=294405&view=diff
> ==============================================================================
> --- llvm/trunk/test/MC/X86/x86-32-coverage.s (original)
> +++ llvm/trunk/test/MC/X86/x86-32-coverage.s Tue Feb 7 23:45:39 2017
> @@ -10654,10 +10654,6 @@ btcq $4, (%eax)
> // CHECK: encoding: [0x66,0x0f,0xae,0x35,0x78,0x56,0x34,0x12]
> clwb 0x12345678
>
> -// CHECK: pcommit
> -// CHECK: encoding: [0x66,0x0f,0xae,0xf8]
> - pcommit
> -
> // CHECK: xsave 3735928559(%ebx,%ecx,8)
> // CHECK: encoding: [0x0f,0xae,0xa4,0xcb,0xef,0xbe,0xad,0xde]
> xsave 0xdeadbeef(%ebx,%ecx,8)
>
> Modified: llvm/trunk/test/Transforms/LoopVectorize/X86/int128_no_gather.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopVectorize/X86/int128_no_gather.ll?rev=294405&r1=294404&r2=294405&view=diff
> ==============================================================================
> --- llvm/trunk/test/Transforms/LoopVectorize/X86/int128_no_gather.ll (original)
> +++ llvm/trunk/test/Transforms/LoopVectorize/X86/int128_no_gather.ll Tue Feb 7 23:45:39 2017
> @@ -71,6 +71,6 @@ declare i32 @printf(i8*, ...) #1
> ; Function Attrs: nounwind
> declare i32 @puts(i8* nocapture readonly) #2
>
> -attributes #0 = { noinline nounwind uwtable "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="skylake-avx512" "target-features"="+adx,+aes,+avx,+avx2,+avx512bw,+avx512cd,+avx512dq,+avx512f,+avx512vl,+bmi,+bmi2,+clflushopt,+clwb,+cx16,+f16c,+fma,+fsgsbase,+fxsr,+lzcnt,+mmx,+movbe,+mpx,+pclmul,+pcommit,+pku,+popcnt,+rdrnd,+rdseed,+rtm,+sgx,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsavec,+xsaveopt,+xsaves" "unsafe-fp-math"="false" "use-soft-float"="false" }
> -attributes #1 = { nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="skylake-avx512" "target-features"="+adx,+aes,+avx,+avx2,+avx512bw,+avx512cd,+avx512dq,+avx512f,+avx512vl,+bmi,+bmi2,+clflushopt,+clwb,+cx16,+f16c,+fma,+fsgsbase,+fxsr,+lzcnt,+mmx,+movbe,+mpx,+pclmul,+pcommit,+pku,+popcnt,+rdrnd,+rdseed,+rtm,+sgx,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsavec,+xsaveopt,+xsaves" "unsafe-fp-math"="false" "use-soft-float"="false" }
> +attributes #0 = { noinline nounwind uwtable "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="skylake-avx512" "target-features"="+adx,+aes,+avx,+avx2,+avx512bw,+avx512cd,+avx512dq,+avx512f,+avx512vl,+bmi,+bmi2,+clflushopt,+clwb,+cx16,+f16c,+fma,+fsgsbase,+fxsr,+lzcnt,+mmx,+movbe,+mpx,+pclmul,+pku,+popcnt,+rdrnd,+rdseed,+rtm,+sgx,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsavec,+xsaveopt,+xsaves" "unsafe-fp-math"="false" "use-soft-float"="false" }
> +attributes #1 = { nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="skylake-avx512" "target-features"="+adx,+aes,+avx,+avx2,+avx512bw,+avx512cd,+avx512dq,+avx512f,+avx512vl,+bmi,+bmi2,+clflushopt,+clwb,+cx16,+f16c,+fma,+fsgsbase,+fxsr,+lzcnt,+mmx,+movbe,+mpx,+pclmul,+pku,+popcnt,+rdrnd,+rdseed,+rtm,+sgx,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsavec,+xsaveopt,+xsaves" "unsafe-fp-math"="false" "use-soft-float"="false" }
> attributes #2 = { nounwind }
>
>
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--
Davide
"There are no solved problems; there are only problems that are more
or less solved" -- Henri Poincare
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