[PATCH] D27169: [x86] Fix getAddressFromInstr

[Michael LeMay via Phabricator via llvm-commits]

mlemay-intel updated this revision to Diff 87452.
mlemay-intel added a comment.

Added test.


https://reviews.llvm.org/D27169

Files:
  lib/Target/X86/X86InstrBuilder.h
  test/CodeGen/X86/safestack-bounds-checking-combiner.mir


Index: test/CodeGen/X86/safestack-bounds-checking-combiner.mir
===================================================================
--- test/CodeGen/X86/safestack-bounds-checking-combiner.mir
+++ test/CodeGen/X86/safestack-bounds-checking-combiner.mir
@@ -28,11 +28,33 @@
     ret void
   }
 
+  %struct.glob_s = type { i32, i32 }
+
+  @x = external local_unnamed_addr global [1 x %struct.glob_s], align 4
+
+  ; Function Attrs: nounwind safestack uwtable
+  define void @glob_access(i32 %i) local_unnamed_addr #0 {
+  entry:
+    %idxprom = sext i32 %i to i64
+    %y = getelementptr inbounds [1 x %struct.glob_s], [1 x %struct.glob_s]* @x, i64 0, i64 %idxprom, i32 0
+    %0 = bitcast i32* %y to i8*
+    %1 = getelementptr i8, i8* %0, i64 4
+    call void asm "bndcu $0, %bnd0", "*m"(i8* %1)
+    store i32 0, i32* %y, align 4
+    %z = getelementptr inbounds [1 x %struct.glob_s], [1 x %struct.glob_s]* @x, i64 0, i64 %idxprom, i32 1
+    %2 = bitcast i32* %z to i8*
+    %3 = getelementptr i8, i8* %2, i64 4
+    call void asm "bndcu $0, %bnd0", "*m"(i8* %3)
+    store i32 0, i32* %z, align 4
+    ret void
+  }
+
   attributes #0 = { nounwind safestack uwtable "target-features"="+mpx,+separate-stack-seg" }
 
 ...
 ---
 name:            overflow_gep_store
+# CHECK-LABEL: name:            overflow_gep_store
 alignment:       4
 exposesReturnsTwice: false
 legalized:       false
@@ -70,3 +92,42 @@
     RETQ
 
 ...
+---
+name:            glob_access
+# CHECK-LABEL: glob_access
+alignment:       4
+exposesReturnsTwice: false
+legalized:       false
+regBankSelected: false
+selected:        false
+tracksRegLiveness: true
+liveins:
+  - { reg: '%edi' }
+frameInfo:
+  isFrameAddressTaken: false
+  isReturnAddressTaken: false
+  hasStackMap:     false
+  hasPatchPoint:   false
+  stackSize:       0
+  offsetAdjustment: 0
+  maxAlignment:    0
+  adjustsStack:    false
+  hasCalls:        false
+  maxCallFrameSize: 0
+  hasOpaqueSPAdjustment: false
+  hasVAStart:      false
+  hasMustTailInVarArgFunc: false
+body:             |
+  bb.0.entry:
+    liveins: %edi
+
+    %rax = MOVSX64rr32 killed %edi
+    INLINEASM $"bndcu $0, %bnd0", 8, 196654, _, 8, %rax, @x + 4, _
+    ; CHECK: INLINEASM $"bndcu $0, %bnd0", 8, 196654, _, 8, %rax, @x + 8, _
+    MOV32mi _, 8, %rax, @x, _, 0
+    INLINEASM $"bndcu $0, %bnd0", 8, 196654, _, 8, %rax, @x + 8, _
+    ; CHECK-NOT: INLINEASM $"bndcu $0, %bnd0", 8, 196654, _, 8, %rax, @x + 8, _
+    MOV32mi _, 8, killed %rax, @x + 4, _, 0
+    RETQ
+
+...
Index: lib/Target/X86/X86InstrBuilder.h
===================================================================
--- lib/Target/X86/X86InstrBuilder.h
+++ lib/Target/X86/X86InstrBuilder.h
@@ -109,9 +109,11 @@
   AM.IndexReg = Op2.getReg();
 
   const MachineOperand &Op3 = MI->getOperand(Operand + 3);
-  if (Op3.isGlobal())
+  // FIXME: Handle additional types of memory references below.
+  if (Op3.isGlobal()) {
     AM.GV = Op3.getGlobal();
-  else
+    AM.Disp = Op3.getOffset();
+  } else
     AM.Disp = Op3.getImm();
 
   return AM;


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