[llvm] r294076 - [GlobalISel] Print the matched patterns using an action.

[Ahmed Bougacha via llvm-commits]

Author: ab
Date: Fri Feb  3 18:47:08 2017
New Revision: 294076

URL: http://llvm.org/viewvc/llvm-project?rev=294076&view=rev
Log:
[GlobalISel] Print the matched patterns using an action.

This lets us split out PatternToMatch from the top-level RuleMatcher,
where it doesn't really belong.  That, in turn, lets us eventually
generate RuleMatchers from non-SelectionDAG sources.

Modified:
    llvm/trunk/test/TableGen/GlobalISelEmitter.td
    llvm/trunk/utils/TableGen/GlobalISelEmitter.cpp

Modified: llvm/trunk/test/TableGen/GlobalISelEmitter.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/TableGen/GlobalISelEmitter.td?rev=294076&r1=294075&r2=294076&view=diff
==============================================================================
--- llvm/trunk/test/TableGen/GlobalISelEmitter.td (original)
+++ llvm/trunk/test/TableGen/GlobalISelEmitter.td Fri Feb  3 18:47:08 2017
@@ -34,6 +34,7 @@ class I<dag OOps, dag IOps, list<dag> Pa
 // CHECK-NEXT: (((MRI.getType(I.getOperand(2).getReg()) == (LLT::scalar(32))) &&
 // CHECK-NEXT:  ((&RBI.getRegBankFromRegClass(MyTarget::GPR32RegClass) == RBI.getRegBank(I.getOperand(2).getReg(), MRI, TRI)))))) {
 
+// CHECK-NEXT:   // (add:i32 GPR32:i32:$src1, GPR32:i32:$src2) => (ADD:i32 GPR32:i32:$src1, GPR32:i32:$src2)
 // CHECK-NEXT:   I.setDesc(TII.get(MyTarget::ADD));
 // CHECK-NEXT:   constrainSelectedInstRegOperands(I, TII, TRI, RBI);
 // CHECK-NEXT:   return true;
@@ -47,6 +48,7 @@ def ADD : I<(outs GPR32:$dst), (ins GPR3
 // CHECK: if ((I.getOpcode() == TargetOpcode::G_BR) &&
 // CHECK-NEXT: (((I.getOperand(0).isMBB())))) {
 
+// CHECK-NEXT:   // (br (bb:Other):$target) => (BR (bb:Other):$target)
 // CHECK-NEXT:   I.setDesc(TII.get(MyTarget::BR));
 // CHECK-NEXT:   constrainSelectedInstRegOperands(I, TII, TRI, RBI);
 // CHECK-NEXT:   return true;

Modified: llvm/trunk/utils/TableGen/GlobalISelEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/GlobalISelEmitter.cpp?rev=294076&r1=294075&r2=294076&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/GlobalISelEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/GlobalISelEmitter.cpp Fri Feb  3 18:47:08 2017
@@ -291,6 +291,19 @@ public:
   virtual void emitCxxActionStmts(raw_ostream &OS) const = 0;
 };
 
+/// Generates a comment describing the matched rule being acted upon.
+class DebugCommentAction : public MatchAction {
+private:
+  const PatternToMatch &P;
+
+public:
+  DebugCommentAction(const PatternToMatch &P) : P(P) {}
+
+  virtual void emitCxxActionStmts(raw_ostream &OS) const {
+    OS << "// " << *P.getSrcPattern() << "  =>  " << *P.getDstPattern();
+  }
+};
+
 class MutateOpcodeAction : public MatchAction {
 private:
   const CodeGenInstruction *I;
@@ -310,14 +323,11 @@ public:
 /// support multiple positions to support div/rem fusion or load-multiple
 /// instructions.
 class RuleMatcher {
-  const PatternToMatch &P;
-
   std::vector<std::unique_ptr<InstructionMatcher>> Matchers;
   std::vector<std::unique_ptr<MatchAction>> Actions;
 
 public:
-
-  RuleMatcher(const PatternToMatch &P) : P(P) {}
+  RuleMatcher() {}
 
   InstructionMatcher &addInstructionMatcher() {
     Matchers.emplace_back(new InstructionMatcher());
@@ -334,9 +344,6 @@ public:
     if (Matchers.empty())
       llvm_unreachable("Unexpected empty matcher!");
 
-    OS << "  // Src: " << *P.getSrcPattern() << "\n"
-       << "  // Dst: " << *P.getDstPattern() << "\n";
-
     // The representation supports rules that require multiple roots such as:
     //    %ptr(p0) = ...
     //    %elt0(s32) = G_LOAD %ptr
@@ -385,7 +392,8 @@ Optional<GlobalISelEmitter::SkipReason>
 GlobalISelEmitter::runOnPattern(const PatternToMatch &P, raw_ostream &OS) {
 
   // Keep track of the matchers and actions to emit.
-  RuleMatcher M(P);
+  RuleMatcher M;
+  M.addAction<DebugCommentAction>(P);
 
   // First, analyze the whole pattern.
   // If the entire pattern has a predicate (e.g., target features), ignore it.