[PATCH] D29452: AMDGPU/SI: DAGMutation for removing deps between CSEs
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 2 09:36:01 PST 2017
arsenm added inline comments.
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Comment at: lib/Target/AMDGPU/GCNSchedStrategy.cpp:409-410
+
+ // Try to schedule the two SCEs together so MachineCSE can more easily
+ // remove them.
+ IdenticalSU->addPred(SDep(SU, SDep::Cluster));
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I thought MachineCSE ran well before the scheduler?
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Comment at: test/CodeGen/AMDGPU/init-m0-sched-deps.mir:21-25
+ %m0 = S_MOV_B32 -1
+ %0 = V_MOV_B32_e32 0, implicit %exec
+ %1 = DS_READ_B32 %0, 0, 0, implicit %m0, implicit %exec :: (load 4 from %ir.lds0)
+ %m0 = S_MOV_B32 -1
+ %2 = DS_READ_B32 %0, 4, 0, implicit %m0, implicit %exec :: (load 4 from %ir.lds1)
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Can you add a few more complex cases, like multiple operations using the same def of m0
https://reviews.llvm.org/D29452
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