[llvm] r293883 - [ARM] GlobalISel: Test default banks for load results. NFC.

Diana Picus via llvm-commits llvm-commits at lists.llvm.org
Thu Feb 2 05:00:24 PST 2017


Author: rovka
Date: Thu Feb  2 07:00:24 2017
New Revision: 293883

URL: http://llvm.org/viewvc/llvm-project?rev=293883&view=rev
Log:
[ARM] GlobalISel: Test default banks for load results. NFC.

Check that all scalars are loaded into the GPR by default.

Modified:
    llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir

Modified: llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir?rev=293883&r1=293882&r2=293883&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir (original)
+++ llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir Thu Feb  2 07:00:24 2017
@@ -4,6 +4,8 @@
   define void @test_add_s16() { ret void }
   define void @test_add_s8() { ret void }
   define void @test_add_s1() { ret void }
+
+  define void @test_loads() { ret void }
 ...
 ---
 name:            test_add_s32
@@ -109,3 +111,33 @@ body:             |
     BX_RET 14, _, implicit %r0
 
 ...
+---
+name:            test_loads
+# CHECK-LABEL: name: test_loads
+legalized:       true
+regBankSelected: false
+selected:        false
+# CHECK: registers:
+# CHECK: - { id: 0, class: gprb }
+# CHECK: - { id: 1, class: gprb }
+# CHECK: - { id: 2, class: gprb }
+# CHECK: - { id: 3, class: gprb }
+# CHECK: - { id: 4, class: gprb }
+
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+  - { id: 2, class: _ }
+  - { id: 3, class: _ }
+  - { id: 4, class: _ }
+body:             |
+  bb.0:
+    liveins: %r0
+    %0(p0) = COPY %r0
+    %1(s32) = G_LOAD %0
+    %2(s16) = G_LOAD %0
+    %3(s8)  = G_LOAD %0
+    %4(s1)  = G_LOAD %0
+    BX_RET 14, _, implicit %r0
+
+...




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