[PATCH] D29388: [PPC] Use rldicr instruction for AND with an immediate if possible

[Hiroshi Inoue via Phabricator via llvm-commits]

inouehrs created this revision.

- generate `rldicr` (`clrrdi`) for AND with an immediate like 0xFFFF0000 (i.e. a bit sequence of ones from most significant side and all zero for reminder) on PowerPC platform; currently LLVM generates two or three instructions
- update two unit tests affected by this change


https://reviews.llvm.org/D29388

Files:
  lib/Target/PowerPC/PPCISelDAGToDAG.cpp
  test/CodeGen/PowerPC/fp128-bitcast-after-operation.ll
  test/CodeGen/PowerPC/i64_fp_round.ll

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