[llvm] r293553 - AMDGPU: Fix release build broken by r293551

[Tom Stellard via llvm-commits]

Author: tstellar
Date: Mon Jan 30 16:02:58 2017
New Revision: 293553

URL: http://llvm.org/viewvc/llvm-project?rev=293553&view=rev
Log:
AMDGPU: Fix release build broken by r293551

Modified:
    llvm/trunk/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
    llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp

Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUCallLowering.cpp?rev=293553&r1=293552&r2=293553&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUCallLowering.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUCallLowering.cpp Mon Jan 30 16:02:58 2017
@@ -144,7 +144,6 @@ bool AMDGPUCallLowering::lowerFormalArgu
   Function::const_arg_iterator CurOrigArg = F.arg_begin();
   const AMDGPUTargetLowering &TLI = *getTLI<AMDGPUTargetLowering>();
   for (unsigned i = 0; i != NumArgs; ++i, ++CurOrigArg) {
-    CurOrigArg->getType()->dump();
     MVT ValVT = TLI.getValueType(DL, CurOrigArg->getType()).getSimpleVT();
     ISD::ArgFlagsTy Flags;
     Flags.setOrigAlign(DL.getABITypeAlignment(CurOrigArg->getType()));

Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp?rev=293553&r1=293552&r2=293553&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp Mon Jan 30 16:02:58 2017
@@ -45,9 +45,11 @@ AMDGPURegisterBankInfo::AMDGPURegisterBa
   AlreadyInit = true;
 
   const RegisterBank &RBSGPR = getRegBank(AMDGPU::SGPRRegBankID);
+  (void)RBSGPR;
   assert(&RBSGPR == &AMDGPU::SGPRRegBank);
 
   const RegisterBank &RBVGPR = getRegBank(AMDGPU::VGPRRegBankID);
+  (void)RBVGPR;
   assert(&RBVGPR == &AMDGPU::VGPRRegBank);
 
 }