[llvm] r293413 - [DAGCombiner] Remove unnecessary check on the size of the type of the index of EXTRACT_SUBVECTOR.

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Sat Jan 28 20:38:19 PST 2017


Author: ctopper
Date: Sat Jan 28 22:38:19 2017
New Revision: 293413

URL: http://llvm.org/viewvc/llvm-project?rev=293413&view=rev
Log:
[DAGCombiner] Remove unnecessary check on the size of the type of the index of EXTRACT_SUBVECTOR.

The type system already requires that the number of vector elements must fit in 32-bits so an index should as well. Even if the type of the index were larger all we care about is that the constant index can fit in 64-bits so that we can call getZExtValue.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=293413&r1=293412&r2=293413&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Sat Jan 28 22:38:19 2017
@@ -13916,9 +13916,7 @@ SDValue DAGCombiner::visitEXTRACT_SUBVEC
     ConstantSDNode *ExtIdx = dyn_cast<ConstantSDNode>(N->getOperand(1));
     ConstantSDNode *InsIdx = dyn_cast<ConstantSDNode>(V->getOperand(2));
 
-    if (InsIdx && ExtIdx &&
-        InsIdx->getValueType(0).getSizeInBits() <= 64 &&
-        ExtIdx->getValueType(0).getSizeInBits() <= 64) {
+    if (InsIdx && ExtIdx) {
       // Combine:
       //    (extract_subvec (insert_subvec V1, V2, InsIdx), ExtIdx)
       // Into:




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