[PATCH] D28491: [AArch64] Add new subtarget feature to fuse AES crypto operations

[Matthias Braun via Phabricator via llvm-commits]

MatzeB added a comment.

Look good overal



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Comment at: llvm/lib/Target/AArch64/AArch64.td:183
                                    "Cortex-A57 ARM processors", [
+                                   FeatureFuseAES,
                                    FeatureBalanceFPOps,
----------------
The features seem to be sorted alphabetically (same with the Exynos entry).


================
Comment at: llvm/test/CodeGen/AArch64/misched-fusion.ll:13-19
-; CHECK: mov [[REGTY:[x,w]]]0, [[REGTY]][[ADDRES]]
-; CHECK: mov [[REGTY]]1, [[REGTY]][[SUBRES]]
-; CHECK: bl _foobar
-; CHECK: [[SKIPBLOCK]]:
-; CHECK: mov [[REGTY]]0, [[REGTY]][[SUBRES]]
-; CHECK: mov [[REGTY]]1, [[REGTY]][[ADDRES]]
-; CHECK: bl _foobar
----------------
Why is this test affected here? I see no AES instructions.


Repository:
  rL LLVM

https://reviews.llvm.org/D28491