[llvm] r293126 - [ImplicitNullChecks] Add a test demonstrating a case we don't get today
Sanjoy Das via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 25 17:07:33 PST 2017
Author: sanjoy
Date: Wed Jan 25 19:07:33 2017
New Revision: 293126
URL: http://llvm.org/viewvc/llvm-project?rev=293126&view=rev
Log:
[ImplicitNullChecks] Add a test demonstrating a case we don't get today
Modified:
llvm/trunk/test/CodeGen/X86/implicit-null-checks.mir
Modified: llvm/trunk/test/CodeGen/X86/implicit-null-checks.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/implicit-null-checks.mir?rev=293126&r1=293125&r2=293126&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/implicit-null-checks.mir (original)
+++ llvm/trunk/test/CodeGen/X86/implicit-null-checks.mir Wed Jan 25 19:07:33 2017
@@ -131,6 +131,18 @@
ret i32 0
}
+ define i32 @use_alternate_load_op(i32* %ptr, i32* %ptr2) {
+ entry:
+ %ptr_is_null = icmp eq i32* %ptr, null
+ br i1 %ptr_is_null, label %is_null, label %not_null, !make.implicit !0
+
+ not_null:
+ ret i32 undef
+
+ is_null:
+ ret i32 0
+ }
+
attributes #0 = { "target-features"="+bmi,+bmi2" }
!0 = !{}
@@ -428,6 +440,40 @@ body: |
bb.2.is_null:
%eax = XOR32rr undef %eax, undef %eax, implicit-def dead %eflags
+ RETQ %eax
+
+...
+---
+name: use_alternate_load_op
+# CHECK-LABEL: use_alternate_load_op
+# CHECK: bb.0.entry:
+# CHECK: TEST64rr %rdi, %rdi, implicit-def %eflags
+# CHECK-NEXT: JE_1 %bb.2.is_null, implicit killed %eflags
+# CHECK: bb.1.not_null
+
+alignment: 4
+tracksRegLiveness: true
+liveins:
+ - { reg: '%rdi' }
+ - { reg: '%rsi' }
+body: |
+ bb.0.entry:
+ successors: %bb.2.is_null, %bb.1.not_null
+ liveins: %rdi, %rsi
+
+ TEST64rr %rdi, %rdi, implicit-def %eflags
+ JE_1 %bb.2.is_null, implicit killed %eflags
+
+ bb.1.not_null:
+ liveins: %rdi, %rsi
+
+ %rcx = MOV64rm killed %rsi, 1, _, 0, _
+ %rdx = AND64rm killed %rcx, %rdi, 1, _, 0, _, implicit-def dead %eflags
+ %r10 = MOV64rm killed %rdi, 1, _, 0, _
+ RETQ %r10d
+
+ bb.2.is_null:
+ %eax = XOR32rr undef %eax, undef %eax, implicit-def dead %eflags
RETQ %eax
...
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