[PATCH] D21839: PowerPC: Use shouldAssumeDSOLocal in classifyGlobalReference
Hal Finkel via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 25 16:34:54 PST 2017
On 01/23/2017 04:04 PM, Rafael Avila de Espindola wrote:
> Ping. Is it OK?
Sure; let's try it ;)
-Hal
>
> Rafael Ávila de Espíndola via Phabricator via llvm-commits
> <llvm-commits at lists.llvm.org> writes:
>
>> rafael updated this revision to Diff 84873.
>> rafael added a comment.
>>
>> rebase and add comment.
>>
>>
>> https://reviews.llvm.org/D21839
>>
>> Files:
>> lib/Target/PowerPC/PPCSubtarget.cpp
>> lib/Target/TargetMachine.cpp
>> test/CodeGen/PowerPC/fast-isel-load-store.ll
>> test/CodeGen/PowerPC/mcm-obj.ll
>>
>>
>> Index: test/CodeGen/PowerPC/mcm-obj.ll
>> ===================================================================
>> --- test/CodeGen/PowerPC/mcm-obj.ll
>> +++ test/CodeGen/PowerPC/mcm-obj.ll
>> @@ -108,11 +108,10 @@
>> ret i32 %0
>> }
>>
>> -; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
>> -; accessing tentatively declared variable ti.
>> +; Verify generation of relocations foraccessing variable ti.
>> ;
>> ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM6:[^ ]+]]
>> -; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM6]]
>> +; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO [[SYM6]]
>> ;
>> ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM6:[^ ]+]]
>> ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM6]]
>> Index: test/CodeGen/PowerPC/fast-isel-load-store.ll
>> ===================================================================
>> --- test/CodeGen/PowerPC/fast-isel-load-store.ll
>> +++ test/CodeGen/PowerPC/fast-isel-load-store.ll
>> @@ -196,7 +196,7 @@
>> %1 = add nsw i64 %v, 1
>> store i64 %1, i64* getelementptr inbounds ([8192 x i64], [8192 x i64]* @i, i32 0, i64 5000), align 8
>> ; ELF64: addis
>> -; ELF64: ld
>> +; ELF64: addi
>> ; ELF64: addi
>> ; ELF64: lis
>> ; ELF64: ori
>> Index: lib/Target/TargetMachine.cpp
>> ===================================================================
>> --- lib/Target/TargetMachine.cpp
>> +++ lib/Target/TargetMachine.cpp
>> @@ -156,8 +156,11 @@
>> bool IsTLS = GV && GV->isThreadLocal();
>> bool IsAccessViaCopyRelocs =
>> Options.MCOptions.MCPIECopyRelocations && GV && isa<GlobalVariable>(GV);
>> - // Check if we can use copy relocations.
>> - if (!IsTLS && (RM == Reloc::Static || IsAccessViaCopyRelocs))
>> + Triple::ArchType Arch = TT.getArch();
>> + bool IsPPC =
>> + Arch == Triple::ppc || Arch == Triple::ppc64 || Arch == Triple::ppc64le;
>> + // Check if we can use copy relocations. PowerPC has no copy relocations.
>> + if (!IsTLS && !IsPPC && (RM == Reloc::Static || IsAccessViaCopyRelocs))
>> return true;
>> }
>>
>> Index: lib/Target/PowerPC/PPCSubtarget.cpp
>> ===================================================================
>> --- lib/Target/PowerPC/PPCSubtarget.cpp
>> +++ lib/Target/PowerPC/PPCSubtarget.cpp
>> @@ -220,32 +220,18 @@
>> return UseSubRegLiveness;
>> }
>>
>> -unsigned char PPCSubtarget::classifyGlobalReference(
>> - const GlobalValue *GV) const {
>> +unsigned char
>> +PPCSubtarget::classifyGlobalReference(const GlobalValue *GV) const {
>> // Note that currently we don't generate non-pic references.
>> // If a caller wants that, this will have to be updated.
>>
>> // Large code model always uses the TOC even for local symbols.
>> if (TM.getCodeModel() == CodeModel::Large)
>> return PPCII::MO_PIC_FLAG | PPCII::MO_NLP_FLAG;
>>
>> - unsigned char flags = PPCII::MO_PIC_FLAG;
>> -
>> - // Only if the relocation mode is PIC do we have to worry about
>> - // interposition. In all other cases we can use a slightly looser standard to
>> - // decide how to access the symbol.
>> - if (TM.getRelocationModel() == Reloc::PIC_) {
>> - // If it's local, or it's non-default, it can't be interposed.
>> - if (!GV->hasLocalLinkage() &&
>> - GV->hasDefaultVisibility()) {
>> - flags |= PPCII::MO_NLP_FLAG;
>> - }
>> - return flags;
>> - }
>> -
>> - if (GV->isStrongDefinitionForLinker())
>> - return flags;
>> - return flags | PPCII::MO_NLP_FLAG;
>> + if (TM.shouldAssumeDSOLocal(*GV->getParent(), GV))
>> + return PPCII::MO_PIC_FLAG;
>> + return PPCII::MO_PIC_FLAG | PPCII::MO_NLP_FLAG;
>> }
>>
>> bool PPCSubtarget::isELFv2ABI() const { return TM.isELFv2ABI(); }
>>
>>
>> Index: test/CodeGen/PowerPC/mcm-obj.ll
>> ===================================================================
>> --- test/CodeGen/PowerPC/mcm-obj.ll
>> +++ test/CodeGen/PowerPC/mcm-obj.ll
>> @@ -108,11 +108,10 @@
>> ret i32 %0
>> }
>>
>> -; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
>> -; accessing tentatively declared variable ti.
>> +; Verify generation of relocations foraccessing variable ti.
>> ;
>> ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM6:[^ ]+]]
>> -; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM6]]
>> +; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO [[SYM6]]
>> ;
>> ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM6:[^ ]+]]
>> ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM6]]
>> Index: test/CodeGen/PowerPC/fast-isel-load-store.ll
>> ===================================================================
>> --- test/CodeGen/PowerPC/fast-isel-load-store.ll
>> +++ test/CodeGen/PowerPC/fast-isel-load-store.ll
>> @@ -196,7 +196,7 @@
>> %1 = add nsw i64 %v, 1
>> store i64 %1, i64* getelementptr inbounds ([8192 x i64], [8192 x i64]* @i, i32 0, i64 5000), align 8
>> ; ELF64: addis
>> -; ELF64: ld
>> +; ELF64: addi
>> ; ELF64: addi
>> ; ELF64: lis
>> ; ELF64: ori
>> Index: lib/Target/TargetMachine.cpp
>> ===================================================================
>> --- lib/Target/TargetMachine.cpp
>> +++ lib/Target/TargetMachine.cpp
>> @@ -156,8 +156,11 @@
>> bool IsTLS = GV && GV->isThreadLocal();
>> bool IsAccessViaCopyRelocs =
>> Options.MCOptions.MCPIECopyRelocations && GV && isa<GlobalVariable>(GV);
>> - // Check if we can use copy relocations.
>> - if (!IsTLS && (RM == Reloc::Static || IsAccessViaCopyRelocs))
>> + Triple::ArchType Arch = TT.getArch();
>> + bool IsPPC =
>> + Arch == Triple::ppc || Arch == Triple::ppc64 || Arch == Triple::ppc64le;
>> + // Check if we can use copy relocations. PowerPC has no copy relocations.
>> + if (!IsTLS && !IsPPC && (RM == Reloc::Static || IsAccessViaCopyRelocs))
>> return true;
>> }
>>
>> Index: lib/Target/PowerPC/PPCSubtarget.cpp
>> ===================================================================
>> --- lib/Target/PowerPC/PPCSubtarget.cpp
>> +++ lib/Target/PowerPC/PPCSubtarget.cpp
>> @@ -220,32 +220,18 @@
>> return UseSubRegLiveness;
>> }
>>
>> -unsigned char PPCSubtarget::classifyGlobalReference(
>> - const GlobalValue *GV) const {
>> +unsigned char
>> +PPCSubtarget::classifyGlobalReference(const GlobalValue *GV) const {
>> // Note that currently we don't generate non-pic references.
>> // If a caller wants that, this will have to be updated.
>>
>> // Large code model always uses the TOC even for local symbols.
>> if (TM.getCodeModel() == CodeModel::Large)
>> return PPCII::MO_PIC_FLAG | PPCII::MO_NLP_FLAG;
>>
>> - unsigned char flags = PPCII::MO_PIC_FLAG;
>> -
>> - // Only if the relocation mode is PIC do we have to worry about
>> - // interposition. In all other cases we can use a slightly looser standard to
>> - // decide how to access the symbol.
>> - if (TM.getRelocationModel() == Reloc::PIC_) {
>> - // If it's local, or it's non-default, it can't be interposed.
>> - if (!GV->hasLocalLinkage() &&
>> - GV->hasDefaultVisibility()) {
>> - flags |= PPCII::MO_NLP_FLAG;
>> - }
>> - return flags;
>> - }
>> -
>> - if (GV->isStrongDefinitionForLinker())
>> - return flags;
>> - return flags | PPCII::MO_NLP_FLAG;
>> + if (TM.shouldAssumeDSOLocal(*GV->getParent(), GV))
>> + return PPCII::MO_PIC_FLAG;
>> + return PPCII::MO_PIC_FLAG | PPCII::MO_NLP_FLAG;
>> }
>>
>> bool PPCSubtarget::isELFv2ABI() const { return TM.isELFv2ABI(); }
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--
Hal Finkel
Lead, Compiler Technology and Programming Languages
Leadership Computing Facility
Argonne National Laboratory
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