[llvm] r293073 - PowerPC: Slight cleanup of getReservedRegs(); NFC

Matthias Braun via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 25 09:12:10 PST 2017


Author: matze
Date: Wed Jan 25 11:12:10 2017
New Revision: 293073

URL: http://llvm.org/viewvc/llvm-project?rev=293073&view=rev
Log:
PowerPC: Slight cleanup of getReservedRegs(); NFC

Change getReservedRegs() to not mark a register as reserved and then
revert that decision in some cases. Motivated by the discussion in
https://reviews.llvm.org/D29056

Modified:
    llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp

Modified: llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp?rev=293073&r1=293072&r2=293073&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp Wed Jan 25 11:12:10 2017
@@ -234,30 +234,21 @@ BitVector PPCRegisterInfo::getReservedRe
 
   // The SVR4 ABI reserves r2 and r13
   if (Subtarget.isSVR4ABI()) {
-    markSuperRegs(Reserved, PPC::R2);  // System-reserved register
+    // We only reserve r2 if we need to use the TOC pointer. If we have no
+    // explicit uses of the TOC pointer (meaning we're a leaf function with
+    // no constant-pool loads, etc.) and we have no potential uses inside an
+    // inline asm block, then we can treat r2 has an ordinary callee-saved
+    // register.
+    const PPCFunctionInfo *FuncInfo = MF.getInfo<PPCFunctionInfo>();
+    if (!TM.isPPC64() || FuncInfo->usesTOCBasePtr() || MF.hasInlineAsm())
+      markSuperRegs(Reserved, PPC::R2);  // System-reserved register
     markSuperRegs(Reserved, PPC::R13); // Small Data Area pointer register
   }
 
-  if (TM.isPPC64()) {
-    // On PPC64, r13 is the thread pointer. Never allocate this register.
+  // On PPC64, r13 is the thread pointer. Never allocate this register.
+  if (TM.isPPC64())
     markSuperRegs(Reserved, PPC::R13);
 
-    // The 64-bit SVR4 ABI reserves r2 for the TOC pointer.
-    if (Subtarget.isSVR4ABI()) {
-      // We only reserve r2 if we need to use the TOC pointer. If we have no
-      // explicit uses of the TOC pointer (meaning we're a leaf function with
-      // no constant-pool loads, etc.) and we have no potential uses inside an
-      // inline asm block, then we can treat r2 has an ordinary callee-saved
-      // register.
-      const PPCFunctionInfo *FuncInfo = MF.getInfo<PPCFunctionInfo>();
-      if (!FuncInfo->usesTOCBasePtr() && !MF.hasInlineAsm()) {
-        for (MCSuperRegIterator Super(PPC::R2, this, true); Super.isValid();
-             ++Super)
-          Reserved.reset(*Super);
-      }
-    }
-  }
-
   if (TFI->needsFP(MF))
     markSuperRegs(Reserved, PPC::R31);
 




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