[PATCH] D29020: [ARM] Change TCReturn to tBL if tailcall optimization fails.

[Renato Golin via Phabricator via llvm-commits]

rengolin added reviewers: jmolloy, rovka.
rengolin added a comment.

In https://reviews.llvm.org/D29020#654923, @sanwou01 wrote:

> The tail call optimisation is performed before register allocation, so at that point we don't know if LR is being spilt or not.  If LR was spilt to the stack, then we cannot do a tail call optimisation. That would involve popping back into LR which is not possible in Thumb1 code.


Right, this is a better explanation, thanks!

My concern of this being here is that this is a method that restores registers saved by `spillCalleeSavedRegisters`, and it shouldn't be changing the return instruction.

Also, that loop is all about needing the `POP` instruction or not, so any code that is not `POP` related shouldn't be there.

I'm not familiar with the tail call machinery, so I can't recommend you a better place. I'm adding James and Diana who have worked around frame lowering more than I did. Feel free to include more people you know worked in the area, too.

cheers,
--renato


https://reviews.llvm.org/D29020