[PATCH] D28152: Cortex-A57 scheduling model for ARM backend (AArch32)
Andrew Zhogin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jan 23 08:44:58 PST 2017
andrew.zhogin updated this revision to Diff 85404.
andrew.zhogin added a comment.
ARMScheduleA57WriteRes.td cleaned up from unused scheduling classes (legacy from AArch64). Small corrections according to the review comments.
https://reviews.llvm.org/D28152
Files:
include/llvm/CodeGen/TargetSchedule.h
lib/Target/ARM/ARM.td
lib/Target/ARM/ARMBaseInstrInfo.cpp
lib/Target/ARM/ARMBaseInstrInfo.h
lib/Target/ARM/ARMSchedule.td
lib/Target/ARM/ARMScheduleA57.td
lib/Target/ARM/ARMScheduleA57WriteRes.td
test/CodeGen/ARM/cortex-a57-misched-alu.ll
test/CodeGen/ARM/cortex-a57-misched-basic.ll
test/CodeGen/ARM/cortex-a57-misched-ldm-wrback.ll
test/CodeGen/ARM/cortex-a57-misched-ldm.ll
test/CodeGen/ARM/cortex-a57-misched-stm-wrback.ll
test/CodeGen/ARM/cortex-a57-misched-stm.ll
test/CodeGen/ARM/cortex-a57-misched-vfma.ll
test/CodeGen/ARM/cortex-a57-misched-vldm-wrback.ll
test/CodeGen/ARM/cortex-a57-misched-vldm.ll
test/CodeGen/ARM/cortex-a57-misched-vstm-wrback.ll
test/CodeGen/ARM/cortex-a57-misched-vstm.ll
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