[PATCH] D28922: [LoadCombine] Fix combining of loads which span an aliasing store.

[Michael Spencer via Phabricator via llvm-commits]

Bigcheese updated this revision to Diff 85216.
Bigcheese added a comment.

Handle any instruction which may write to memory.


https://reviews.llvm.org/D28922

Files:
  lib/Transforms/Scalar/LoadCombine.cpp
  test/Transforms/LoadCombine/load-combine-aa.ll


Index: test/Transforms/LoadCombine/load-combine-aa.ll
===================================================================
--- test/Transforms/LoadCombine/load-combine-aa.ll
+++ test/Transforms/LoadCombine/load-combine-aa.ll
@@ -37,3 +37,24 @@
   ret i64 %add
 }
 
+%rec11 = type { i16, i16, i16 }
+ at str = global %rec11 { i16 1, i16 2, i16 3 }
+
+; PR31517 - Check that loads which span an aliasing store are not combined.
+define i16 @test3() {
+; CHECK-LABEL: @test3
+
+; CHECK: load i16, i16*
+; CHECK: store i16
+; CHECK: ret i16
+
+  %_tmp9 = getelementptr %rec11, %rec11* @str, i16 0, i32 1
+  %_tmp10 = load i16, i16* %_tmp9
+  %_tmp12 = getelementptr %rec11, %rec11* @str, i16 0, i32 0
+  store i16 %_tmp10, i16* %_tmp12
+  %_tmp13 = getelementptr %rec11, %rec11* @str, i16 0, i32 0
+  %_tmp14 = load i16, i16* %_tmp13
+  %_tmp15 = icmp eq i16 %_tmp14, 3
+  %_tmp16 = select i1 %_tmp15, i16 1, i16 0
+  ret i16 %_tmp16
+}
Index: lib/Transforms/Scalar/LoadCombine.cpp
===================================================================
--- lib/Transforms/Scalar/LoadCombine.cpp
+++ lib/Transforms/Scalar/LoadCombine.cpp
@@ -245,13 +245,17 @@
   bool Combined = false;
   unsigned Index = 0;
   for (auto &I : BB) {
-    if (I.mayThrow() || (I.mayWriteToMemory() && AST.containsUnknown(&I))) {
+    if (I.mayThrow() || AST.containsUnknown(&I)) {
       if (combineLoads(LoadMap))
         Combined = true;
       LoadMap.clear();
       AST.clear();
       continue;
     }
+    if (I.mayWriteToMemory()) {
+      AST.add(&I);
+      continue;
+    }
     LoadInst *LI = dyn_cast<LoadInst>(&I);
     if (!LI)
       continue;


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