[PATCH] D28947: [XRay][AArch64] More staging for tail call support in XRay on AArch64 - in LLVM

[Serge Rogatch via Phabricator via llvm-commits]

rSerge created this revision.
Herald added a subscriber: aemerson.

This patch prepares more for tail call support in XRay. Until the logging part supports tail calls, this is just staging, so it seems LLVM part is mostly ready with this patch.


https://reviews.llvm.org/D28947

Files:
  lib/Target/AArch64/AArch64InstrInfo.cpp
  lib/Target/AArch64/AArch64InstrInfo.h
  test/CodeGen/AArch64/xray-tail-call-sled.ll


Index: test/CodeGen/AArch64/xray-tail-call-sled.ll
===================================================================
--- test/CodeGen/AArch64/xray-tail-call-sled.ll
+++ test/CodeGen/AArch64/xray-tail-call-sled.ll
@@ -0,0 +1,57 @@
+; RUN: llc -filetype=asm -o - -mtriple=aarch64-linux-gnu < %s | FileCheck %s
+
+define i32 @callee() nounwind noinline uwtable "function-instrument"="xray-always" {
+; CHECK:       .p2align	2
+; CHECK-LABEL: .Lxray_sled_0:
+; CHECK-NEXT:  b	#32
+; CHECK-NEXT:  nop
+; CHECK-NEXT:  nop
+; CHECK-NEXT:  nop
+; CHECK-NEXT:  nop
+; CHECK-NEXT:  nop
+; CHECK-NEXT:  nop
+; CHECK-NEXT:  nop
+; CHECK-LABEL: .Ltmp0:
+  ret i32 0
+; CHECK-NEXT:  mov	w0, wzr
+; CHECK-NEXT:  .p2align	2
+; CHECK-LABEL: .Lxray_sled_1:
+; CHECK-NEXT:  b	#32
+; CHECK-NEXT:  nop
+; CHECK-NEXT:  nop
+; CHECK-NEXT:  nop
+; CHECK-NEXT:  nop
+; CHECK-NEXT:  nop
+; CHECK-NEXT:  nop
+; CHECK-NEXT:  nop
+; CHECK-LABEL: .Ltmp1:
+; CHECK-NEXT:  ret
+}
+
+define i32 @caller() nounwind noinline uwtable "function-instrument"="xray-always" {
+; CHECK:       .p2align	2
+; CHECK-LABEL: .Lxray_sled_2:
+; CHECK-NEXT:  b	#32
+; CHECK-NEXT:  nop
+; CHECK-NEXT:  nop
+; CHECK-NEXT:  nop
+; CHECK-NEXT:  nop
+; CHECK-NEXT:  nop
+; CHECK-NEXT:  nop
+; CHECK-NEXT:  nop
+; CHECK-LABEL: .Ltmp2:
+; CHECK:       .p2align	2
+; CHECK-LABEL: .Lxray_sled_3:
+; CHECK-NEXT:  b	#32
+; CHECK-NEXT:  nop
+; CHECK-NEXT:  nop
+; CHECK-NEXT:  nop
+; CHECK-NEXT:  nop
+; CHECK-NEXT:  nop
+; CHECK-NEXT:  nop
+; CHECK-NEXT:  nop
+; CHECK-LABEL: .Ltmp3:
+  %retval = tail call i32 @callee()
+; CHECK:       b	callee
+  ret i32 %retval
+}
Index: lib/Target/AArch64/AArch64InstrInfo.h
===================================================================
--- lib/Target/AArch64/AArch64InstrInfo.h
+++ lib/Target/AArch64/AArch64InstrInfo.h
@@ -87,6 +87,8 @@
   /// Return true if this is an unscaled load/store.
   bool isUnscaledLdSt(MachineInstr &MI) const;
 
+  bool isTailCall(const MachineInstr &Inst) const override;
+
   static bool isPairableLdStInst(const MachineInstr &MI) {
     switch (MI.getOpcode()) {
     default:
Index: lib/Target/AArch64/AArch64InstrInfo.cpp
===================================================================
--- lib/Target/AArch64/AArch64InstrInfo.cpp
+++ lib/Target/AArch64/AArch64InstrInfo.cpp
@@ -1627,6 +1627,17 @@
   return isUnscaledLdSt(MI.getOpcode());
 }
 
+bool AArch64InstrInfo::isTailCall(const MachineInstr &Inst) const
+{
+  switch (Inst.getOpcode()) {
+  case AArch64::TCRETURNdi:
+  case AArch64::TCRETURNri:
+    return true;
+  default:
+    return false;
+  }
+}
+
 // Is this a candidate for ld/st merging or pairing?  For example, we don't
 // touch volatiles or load/stores that have a hint to avoid pair formation.
 bool AArch64InstrInfo::isCandidateToMergeOrPair(MachineInstr &MI) const {


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D28947.85126.patch
Type: text/x-patch
Size: 2899 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20170120/ab9454d4/attachment.bin>