[llvm] r292521 - [AMDGPU] Add exec copy to LiveIntervals in SILowerControlFlow::emitElse

Stanislav Mekhanoshin via llvm-commits llvm-commits at lists.llvm.org
Thu Jan 19 13:26:22 PST 2017


Author: rampitec
Date: Thu Jan 19 15:26:22 2017
New Revision: 292521

URL: http://llvm.org/viewvc/llvm-project?rev=292521&view=rev
Log:
[AMDGPU] Add exec copy to LiveIntervals in SILowerControlFlow::emitElse

This instruction is missing from LiveIntervals.
I'm not aware of any problems because of this though.

Differential Revision: https://reviews.llvm.org/D28879

Modified:
    llvm/trunk/lib/Target/AMDGPU/SILowerControlFlow.cpp

Modified: llvm/trunk/lib/Target/AMDGPU/SILowerControlFlow.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SILowerControlFlow.cpp?rev=292521&r1=292520&r2=292521&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SILowerControlFlow.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/SILowerControlFlow.cpp Thu Jan 19 15:26:22 2017
@@ -219,7 +219,8 @@ void SILowerControlFlow::emitElse(Machin
   // tied. In order to correctly tie the registers, split this into a copy of
   // the src like it does.
   unsigned CopyReg = MRI->createVirtualRegister(&AMDGPU::SReg_64RegClass);
-  BuildMI(MBB, Start, DL, TII->get(AMDGPU::COPY), CopyReg)
+  MachineInstr *CopyExec =
+    BuildMI(MBB, Start, DL, TII->get(AMDGPU::COPY), CopyReg)
       .add(MI.getOperand(1)); // Saved EXEC
 
   // This must be inserted before phis and any spill code inserted before the
@@ -261,6 +262,7 @@ void SILowerControlFlow::emitElse(Machin
   LIS->RemoveMachineInstrFromMaps(MI);
   MI.eraseFromParent();
 
+  LIS->InsertMachineInstrInMaps(*CopyExec);
   LIS->InsertMachineInstrInMaps(*OrSaveExec);
 
   LIS->InsertMachineInstrInMaps(*Xor);




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