[PATCH] D27997: [AMDGPU] Prevent spills before exec mask is restored
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 19 10:42:50 PST 2017
arsenm added inline comments.
================
Comment at: lib/Target/AMDGPU/SIInstrInfo.cpp:3644
+
+bool SIInstrInfo::isBasicBlockPrologue(const MachineInstr &MI) const {
+ const TargetRegisterInfo *TRI = &getRegisterInfo();
----------------
There are some weird graphics intrinsics that end up with exec modifications in the middle of the block (I was working towards splitting the blocks at these points, but I'm not sure it's generally possible. For the purposes of this hook, it's probably good enough. I'm not sure I have any better name ideas
================
Comment at: lib/Target/AMDGPU/SIInstrInfo.cpp:3645-3648
+ const TargetRegisterInfo *TRI = &getRegisterInfo();
+
+ return !MI.isTerminator() && MI.getOpcode() != AMDGPU::COPY &&
+ MI.modifiesRegister(AMDGPU::EXEC, TRI);
----------------
You can access the RI member directly in SIInstrInfo
Repository:
rL LLVM
https://reviews.llvm.org/D27997
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