[PATCH] D28891: add support for Cavium ThunderX ARM64 processors

[Matthias Braun via Phabricator via llvm-commits]

MatzeB added inline comments.


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Comment at: lib/Target/AArch64/AArch64Subtarget.cpp:90
+    MaxPrefetchIterationsAhead = 8;
+    HasLSE = true;
+    PrefFunctionAlignment = 4;
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HasLSE and HasV8_1aOps are already modeled as target features and should not set here. This switch exists because we cannot model integer (or any non-boolean) values with target features today. The rest should go to AArch64.td where you already added it anyway it seems.


Repository:
  rL LLVM

https://reviews.llvm.org/D28891