[PATCH] D28881: LiveIntervalAnalysis: Calculate liveness even if a superreg is reserved.

[Matthias Braun via Phabricator via llvm-commits]

MatzeB created this revision.
Herald added a subscriber: mcrosier.

A register unit may be allocatable and non-reserved but some of the
register(tuples) built with it are reserved. We still need to calculate
liveness in this case.


Repository:
  rL LLVM

https://reviews.llvm.org/D28881

Files:
  lib/CodeGen/LiveIntervalAnalysis.cpp
  test/CodeGen/AArch64/live-interval-analysis.mir


Index: test/CodeGen/AArch64/live-interval-analysis.mir
===================================================================
--- /dev/null
+++ test/CodeGen/AArch64/live-interval-analysis.mir
@@ -0,0 +1,22 @@
+# RUN: llc -o /dev/null %s -mtriple=aarch64-darwin-ios -run-pass=liveintervals -debug-only=regalloc -precompute-phys-liveness 2>&1 | FileCheck %s
+# REQUIRES: asserts
+--- |
+  define void @reserved_reg_liveness() { ret void }
+...
+---
+# CHECK-LABEL: ********** INTERVALS **********
+# W29 is reserved, so we should only see dead defs
+# CHECK-DAG: W29 [0B,0d:{{[0-9]+}})[32r,32d:{{[0-9]+}})[64r,64d:{{[0-9]+}})
+# For normal registers like x28 we should see the full intervals
+# CHECK-DAG: W28 [0B,16r:{{[0-9]+}})[32r,48r:{{[0-9]+}})[48r,48d:{{[0-9]+}})
+# CHECK: # End machine code for function reserved_reg_liveness.
+name: reserved_reg_liveness
+tracksRegLiveness: true
+body: |
+  bb.0:
+    liveins: %x28_fp
+    %6 : xseqpairsclass = COPY %x28_fp
+    %x28_fp = COPY %6
+    %x28 = COPY %x28
+    %fp = COPY %fp
+...
Index: lib/CodeGen/LiveIntervalAnalysis.cpp
===================================================================
--- lib/CodeGen/LiveIntervalAnalysis.cpp
+++ lib/CodeGen/LiveIntervalAnalysis.cpp
@@ -253,23 +253,28 @@
   // may share super-registers. That's OK because createDeadDefs() is
   // idempotent. It is very rare for a register unit to have multiple roots, so
   // uniquing super-registers is probably not worthwhile.
+  bool IsReserved = true;
   for (MCRegUnitRootIterator Root(Unit, TRI); Root.isValid(); ++Root) {
     for (MCSuperRegIterator Super(*Root, TRI, /*IncludeSelf=*/true);
          Super.isValid(); ++Super) {
       unsigned Reg = *Super;
       if (!MRI->reg_empty(Reg))
         LRCalc->createDeadDefs(LR, Reg);
     }
+    if (IsReserved && !MRI->isReserved(*Root))
+      IsReserved = false;
   }
 
   // Now extend LR to reach all uses.
   // Ignore uses of reserved registers. We only track defs of those.
-  for (MCRegUnitRootIterator Root(Unit, TRI); Root.isValid(); ++Root) {
-    for (MCSuperRegIterator Super(*Root, TRI, /*IncludeSelf=*/true);
-         Super.isValid(); ++Super) {
-      unsigned Reg = *Super;
-      if (!MRI->isReserved(Reg) && !MRI->reg_empty(Reg))
-        LRCalc->extendToUses(LR, Reg);
+  if (!IsReserved) {
+    for (MCRegUnitRootIterator Root(Unit, TRI); Root.isValid(); ++Root) {
+      for (MCSuperRegIterator Super(*Root, TRI, /*IncludeSelf=*/true);
+           Super.isValid(); ++Super) {
+        unsigned Reg = *Super;
+        if (!MRI->reg_empty(Reg))
+          LRCalc->extendToUses(LR, Reg);
+      }
     }
   }
 


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