[llvm] r292361 - [X86][SSE] Simplify umax knownbits test

[Simon Pilgrim via llvm-commits]

Author: rksimon
Date: Wed Jan 18 05:20:31 2017
New Revision: 292361

URL: http://llvm.org/viewvc/llvm-project?rev=292361&view=rev
Log:
[X86][SSE] Simplify umax knownbits test

combineSRA doesn't detect sign bits splats that it does itself so just use -1 as the demanded input so that its already splatted

Modified:
    llvm/trunk/test/CodeGen/X86/known-bits-vector.ll

Modified: llvm/trunk/test/CodeGen/X86/known-bits-vector.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/known-bits-vector.ll?rev=292361&r1=292360&r2=292361&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/known-bits-vector.ll (original)
+++ llvm/trunk/test/CodeGen/X86/known-bits-vector.ll Wed Jan 18 05:20:31 2017
@@ -520,7 +520,7 @@ define <4 x i32> @knownbits_umax_shuffle
 ; X64-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,2]
 ; X64-NEXT:    vpsrad $31, %xmm0, %xmm0
 ; X64-NEXT:    retq
-  %1 = call <4 x i32> @llvm.x86.sse41.pmaxud(<4 x i32> %a0, <4 x i32> <i32 65535, i32 -1, i32 -15, i32 262143>)
+  %1 = call <4 x i32> @llvm.x86.sse41.pmaxud(<4 x i32> %a0, <4 x i32> <i32 65535, i32 -1, i32 -1, i32 262143>)
   %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 1, i32 1, i32 2, i32 2>
   %3 = ashr <4 x i32> %2, <i32 31, i32 31, i32 31, i32 31>
   ret <4 x i32> %3