[llvm] r292277 - [X86][SSE] Split UMIN and UMAX known bits tests
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 17 14:12:25 PST 2017
Author: rksimon
Date: Tue Jan 17 16:12:25 2017
New Revision: 292277
URL: http://llvm.org/viewvc/llvm-project?rev=292277&view=rev
Log:
[X86][SSE] Split UMIN and UMAX known bits tests
Modified:
llvm/trunk/test/CodeGen/X86/known-bits-vector.ll
Modified: llvm/trunk/test/CodeGen/X86/known-bits-vector.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/known-bits-vector.ll?rev=292277&r1=292276&r2=292277&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/known-bits-vector.ll (original)
+++ llvm/trunk/test/CodeGen/X86/known-bits-vector.ll Tue Jan 17 16:12:25 2017
@@ -476,10 +476,9 @@ define <4 x float> @knownbits_smax_smin_
declare <4 x i32> @llvm.x86.sse41.pmaxsd(<4 x i32>, <4 x i32>) nounwind readnone
declare <4 x i32> @llvm.x86.sse41.pminsd(<4 x i32>, <4 x i32>) nounwind readnone
-define <4 x float> @knownbits_umax_umin_shuffle_uitofp(<4 x i32> %a0) {
-; X32-LABEL: knownbits_umax_umin_shuffle_uitofp:
+define <4 x float> @knownbits_umin_shuffle_uitofp(<4 x i32> %a0) {
+; X32-LABEL: knownbits_umin_shuffle_uitofp:
; X32: # BB#0:
-; X32-NEXT: vpmaxud {{\.LCPI.*}}, %xmm0, %xmm0
; X32-NEXT: vpminud {{\.LCPI.*}}, %xmm0, %xmm0
; X32-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,3,3]
; X32-NEXT: vpblendw {{.*#+}} xmm1 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7]
@@ -489,9 +488,8 @@ define <4 x float> @knownbits_umax_umin_
; X32-NEXT: vaddps %xmm0, %xmm1, %xmm0
; X32-NEXT: retl
;
-; X64-LABEL: knownbits_umax_umin_shuffle_uitofp:
+; X64-LABEL: knownbits_umin_shuffle_uitofp:
; X64: # BB#0:
-; X64-NEXT: vpmaxud {{.*}}(%rip), %xmm0, %xmm0
; X64-NEXT: vpminud {{.*}}(%rip), %xmm0, %xmm0
; X64-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,3,3]
; X64-NEXT: vpblendw {{.*#+}} xmm1 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7]
@@ -500,15 +498,34 @@ define <4 x float> @knownbits_umax_umin_
; X64-NEXT: vaddps {{.*}}(%rip), %xmm0, %xmm0
; X64-NEXT: vaddps %xmm0, %xmm1, %xmm0
; X64-NEXT: retq
- %1 = call <4 x i32> @llvm.x86.sse41.pmaxud(<4 x i32> %a0, <4 x i32> <i32 255, i32 -1, i32 -1, i32 1023>)
- %2 = call <4 x i32> @llvm.x86.sse41.pminud(<4 x i32> %1, <4 x i32> <i32 65535, i32 -1, i32 -1, i32 262143>)
- %3 = shufflevector <4 x i32> %2, <4 x i32> undef, <4 x i32> <i32 0, i32 0, i32 3, i32 3>
- %4 = uitofp <4 x i32> %3 to <4 x float>
- ret <4 x float> %4
+ %1 = call <4 x i32> @llvm.x86.sse41.pminud(<4 x i32> %a0, <4 x i32> <i32 65535, i32 -1, i32 -1, i32 262143>)
+ %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 0, i32 0, i32 3, i32 3>
+ %3 = uitofp <4 x i32> %2 to <4 x float>
+ ret <4 x float> %3
}
declare <4 x i32> @llvm.x86.sse41.pmaxud(<4 x i32>, <4 x i32>) nounwind readnone
declare <4 x i32> @llvm.x86.sse41.pminud(<4 x i32>, <4 x i32>) nounwind readnone
+define <4 x i32> @knownbits_umax_shuffle_ashr(<4 x i32> %a0) {
+; X32-LABEL: knownbits_umax_shuffle_ashr:
+; X32: # BB#0:
+; X32-NEXT: vpmaxud {{\.LCPI.*}}, %xmm0, %xmm0
+; X32-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,2]
+; X32-NEXT: vpsrad $31, %xmm0, %xmm0
+; X32-NEXT: retl
+;
+; X64-LABEL: knownbits_umax_shuffle_ashr:
+; X64: # BB#0:
+; X64-NEXT: vpmaxud {{.*}}(%rip), %xmm0, %xmm0
+; X64-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,2]
+; X64-NEXT: vpsrad $31, %xmm0, %xmm0
+; X64-NEXT: retq
+ %1 = call <4 x i32> @llvm.x86.sse41.pmaxud(<4 x i32> %a0, <4 x i32> <i32 65535, i32 -1, i32 -15, i32 262143>)
+ %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 1, i32 1, i32 2, i32 2>
+ %3 = ashr <4 x i32> %2, <i32 31, i32 31, i32 31, i32 31>
+ ret <4 x i32> %3
+}
+
define <4 x float> @knownbits_mask_umax_shuffle_uitofp(<4 x i32> %a0) {
; X32-LABEL: knownbits_mask_umax_shuffle_uitofp:
; X32: # BB#0:
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