[PATCH] D28818: [PPC] Some generic cleanup of mayLoad/mayStore flags and memory operands

[Sean Fertile via Phabricator via llvm-commits]

sfertile created this revision.

Another patch I am working on was querying the mayLoad and mayStore flags on machine SDNodes, as well as accessing the memory-operands of load instructions. I found a number of issues where the flags weren't set correctly, or the MachineSDNode was missing its memory operands. This patch addresses those issues.

1. Explicitly sets mayLoad/mayStore property in the tablegen files on load/store instructions.
2. Updated the flags on a number of intrinsics indicating that they write memory.
3. Added SDNPMemOperand flags for some target dependent SDNodes so that they propagate their memory operand,


Repository:
  rL LLVM

https://reviews.llvm.org/D28818

Files:
  include/llvm/IR/IntrinsicsPowerPC.td
  lib/Target/PowerPC/PPCISelDAGToDAG.cpp
  lib/Target/PowerPC/PPCInstr64Bit.td
  lib/Target/PowerPC/PPCInstrAltivec.td
  lib/Target/PowerPC/PPCInstrInfo.td
  lib/Target/PowerPC/PPCInstrVSX.td

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