[llvm] r292094 - [AVX-512] Teach the disassembler about all of the EVEX gather and scatter instructions.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Sun Jan 15 21:44:34 PST 2017
Author: ctopper
Date: Sun Jan 15 23:44:33 2017
New Revision: 292094
URL: http://llvm.org/viewvc/llvm-project?rev=292094&view=rev
Log:
[AVX-512] Teach the disassembler about all of the EVEX gather and scatter instructions.
Modified:
llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp
llvm/trunk/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
llvm/trunk/test/MC/Disassembler/X86/avx-512.txt
Modified: llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp?rev=292094&r1=292093&r2=292094&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp (original)
+++ llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp Sun Jan 15 23:44:33 2017
@@ -767,7 +767,27 @@ static bool translateRMMemory(MCInst &mc
Opcode == X86::VPGATHERDQYrm ||
Opcode == X86::VPGATHERQQrm ||
Opcode == X86::VPGATHERDDrm ||
- Opcode == X86::VPGATHERQDrm);
+ Opcode == X86::VPGATHERQDrm ||
+ Opcode == X86::VGATHERDPDZ128rm ||
+ Opcode == X86::VGATHERDPDZ256rm ||
+ Opcode == X86::VGATHERDPSZ128rm ||
+ Opcode == X86::VGATHERQPDZ128rm ||
+ Opcode == X86::VGATHERQPSZ128rm ||
+ Opcode == X86::VPGATHERDDZ128rm ||
+ Opcode == X86::VPGATHERDQZ128rm ||
+ Opcode == X86::VPGATHERDQZ256rm ||
+ Opcode == X86::VPGATHERQDZ128rm ||
+ Opcode == X86::VPGATHERQQZ128rm ||
+ Opcode == X86::VSCATTERDPDZ128mr ||
+ Opcode == X86::VSCATTERDPDZ256mr ||
+ Opcode == X86::VSCATTERDPSZ128mr ||
+ Opcode == X86::VSCATTERQPDZ128mr ||
+ Opcode == X86::VSCATTERQPSZ128mr ||
+ Opcode == X86::VPSCATTERDDZ128mr ||
+ Opcode == X86::VPSCATTERDQZ128mr ||
+ Opcode == X86::VPSCATTERDQZ256mr ||
+ Opcode == X86::VPSCATTERQDZ128mr ||
+ Opcode == X86::VPSCATTERQQZ128mr);
bool IndexIs256 = (Opcode == X86::VGATHERQPDYrm ||
Opcode == X86::VGATHERDPSYrm ||
Opcode == X86::VGATHERQPSYrm ||
@@ -775,13 +795,49 @@ static bool translateRMMemory(MCInst &mc
Opcode == X86::VPGATHERDQZrm ||
Opcode == X86::VPGATHERQQYrm ||
Opcode == X86::VPGATHERDDYrm ||
- Opcode == X86::VPGATHERQDYrm);
+ Opcode == X86::VPGATHERQDYrm ||
+ Opcode == X86::VGATHERDPSZ256rm ||
+ Opcode == X86::VGATHERQPDZ256rm ||
+ Opcode == X86::VGATHERQPSZ256rm ||
+ Opcode == X86::VPGATHERDDZ256rm ||
+ Opcode == X86::VPGATHERQQZ256rm ||
+ Opcode == X86::VPGATHERQDZ256rm ||
+ Opcode == X86::VSCATTERDPDZmr ||
+ Opcode == X86::VPSCATTERDQZmr ||
+ Opcode == X86::VSCATTERDPSZ256mr ||
+ Opcode == X86::VSCATTERQPDZ256mr ||
+ Opcode == X86::VSCATTERQPSZ256mr ||
+ Opcode == X86::VPSCATTERDDZ256mr ||
+ Opcode == X86::VPSCATTERQQZ256mr ||
+ Opcode == X86::VPSCATTERQDZ256mr ||
+ Opcode == X86::VGATHERPF0DPDm ||
+ Opcode == X86::VGATHERPF1DPDm ||
+ Opcode == X86::VSCATTERPF0DPDm ||
+ Opcode == X86::VSCATTERPF1DPDm);
bool IndexIs512 = (Opcode == X86::VGATHERQPDZrm ||
Opcode == X86::VGATHERDPSZrm ||
Opcode == X86::VGATHERQPSZrm ||
Opcode == X86::VPGATHERQQZrm ||
Opcode == X86::VPGATHERDDZrm ||
- Opcode == X86::VPGATHERQDZrm);
+ Opcode == X86::VPGATHERQDZrm ||
+ Opcode == X86::VSCATTERQPDZmr ||
+ Opcode == X86::VSCATTERDPSZmr ||
+ Opcode == X86::VSCATTERQPSZmr ||
+ Opcode == X86::VPSCATTERQQZmr ||
+ Opcode == X86::VPSCATTERDDZmr ||
+ Opcode == X86::VPSCATTERQDZmr ||
+ Opcode == X86::VGATHERPF0DPSm ||
+ Opcode == X86::VGATHERPF0QPDm ||
+ Opcode == X86::VGATHERPF0QPSm ||
+ Opcode == X86::VGATHERPF1DPSm ||
+ Opcode == X86::VGATHERPF1QPDm ||
+ Opcode == X86::VGATHERPF1QPSm ||
+ Opcode == X86::VSCATTERPF0DPSm ||
+ Opcode == X86::VSCATTERPF0QPDm ||
+ Opcode == X86::VSCATTERPF0QPSm ||
+ Opcode == X86::VSCATTERPF1DPSm ||
+ Opcode == X86::VSCATTERPF1QPDm ||
+ Opcode == X86::VSCATTERPF1QPSm);
if (IndexIs128 || IndexIs256 || IndexIs512) {
unsigned IndexOffset = insn.sibIndex -
(insn.addressSize == 8 ? SIB_INDEX_RAX:SIB_INDEX_EAX);
Modified: llvm/trunk/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp?rev=292094&r1=292093&r2=292094&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp (original)
+++ llvm/trunk/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp Sun Jan 15 23:44:33 2017
@@ -1758,7 +1758,14 @@ static int readOperands(struct InternalI
// VSIB can use the V2 bit so check only the other bits.
if (needVVVV)
needVVVV = hasVVVV & ((insn->vvvv & 0xf) != 0);
- // fallthrough
+ if (readModRM(insn))
+ return -1;
+ if (fixupReg(insn, &Op))
+ return -1;
+ // Apply the AVX512 compressed displacement scaling factor.
+ if (Op.encoding != ENCODING_REG && insn->eaDisplacement == EA_DISP_8)
+ insn->displacement *= 1 << (Op.encoding - ENCODING_VSIB);
+ break;
case ENCODING_REG:
CASE_ENCODING_RM:
if (readModRM(insn))
Modified: llvm/trunk/test/MC/Disassembler/X86/avx-512.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/X86/avx-512.txt?rev=292094&r1=292093&r2=292094&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/X86/avx-512.txt (original)
+++ llvm/trunk/test/MC/Disassembler/X86/avx-512.txt Sun Jan 15 23:44:33 2017
@@ -170,3 +170,98 @@
# CHECK: vcmpps $127, %xmm27, %xmm11, %k4
0x62 0x91 0x24 0x08 0xc2 0xe3 0x7f
+# CHECK: vpgatherdd 256(%r9,%xmm31), %xmm17 {%k1}
+0x62 0x82 0x7d 0x01 0x90 0x4c 0x39 0x40
+
+# CHECK: vpgatherdd 256(%r9,%ymm31), %ymm19 {%k1}
+0x62 0x82 0x7d 0x21 0x90 0x5c 0x39 0x40
+
+# CHECK: vpgatherdq 256(%r9,%xmm31), %xmm17 {%k1}
+0x62 0x82 0xfd 0x01 0x90 0x4c 0x39 0x20
+
+# CHECK: vpgatherdq 256(%r9,%xmm31), %ymm26 {%k1}
+0x62 0x02 0xfd 0x21 0x90 0x54 0x39 0x20
+
+# CHECK: vpgatherqd 256(%r9,%xmm31), %xmm21 {%k1}
+0x62 0x82 0x7d 0x01 0x91 0x6c 0x39 0x40
+
+# CHECK: vpgatherqd 256(%r9,%ymm31), %xmm25 {%k1}
+0x62 0x02 0x7d 0x21 0x91 0x4c 0x39 0x40
+
+# CHECK: vpgatherqq 256(%r9,%xmm31), %xmm18 {%k1}
+0x62 0x82 0xfd 0x01 0x91 0x54 0x39 0x20
+
+# CHECK: vpgatherqq 256(%r9,%ymm31), %ymm19 {%k1}
+0x62 0x82 0xfd 0x21 0x91 0x5c 0x39 0x20
+
+# CHECK: vgatherdpd 256(%r9,%xmm31), %xmm17 {%k1}
+0x62 0x82 0xfd 0x01 0x92 0x4c 0x39 0x20
+
+# CHECK: vgatherdpd 256(%r9,%xmm31), %ymm23 {%k1}
+0x62 0x82 0xfd 0x21 0x92 0x7c 0x39 0x20
+
+# CHECK: vgatherdps 256(%r9,%xmm31), %xmm18 {%k1}
+0x62 0x82 0x7d 0x01 0x92 0x54 0x39 0x40
+
+# CHECK: vgatherdps 256(%r9,%ymm31), %ymm27 {%k1}
+0x62 0x02 0x7d 0x21 0x92 0x5c 0x39 0x40
+
+# CHECK: vgatherqpd 256(%r9,%xmm31), %xmm17 {%k1}
+0x62 0x82 0xfd 0x01 0x93 0x4c 0x39 0x20
+
+# CHECK: vgatherqpd 256(%r9,%ymm31), %ymm29 {%k1}
+0x62 0x02 0xfd 0x21 0x93 0x6c 0x39 0x20
+
+# CHECK: vgatherqps 256(%r9,%xmm31), %xmm21 {%k1}
+0x62 0x82 0x7d 0x01 0x93 0x6c 0x39 0x40
+
+# CHECK: vgatherqps 256(%r9,%ymm31), %xmm19 {%k1}
+0x62 0x82 0x7d 0x21 0x93 0x5c 0x39 0x40
+
+# CHECK: vpscatterdd %xmm20, 256(%r9,%xmm31) {%k1}
+0x62 0x82 0x7d 0x01 0xa0 0x64 0x39 0x40
+
+# CHECK: vpscatterdd %ymm28, 256(%r9,%ymm31) {%k1}
+0x62 0x02 0x7d 0x21 0xa0 0x64 0x39 0x40
+
+# CHECK: vpscatterdq %xmm21, 256(%r9,%xmm31) {%k1}
+0x62 0x82 0xfd 0x01 0xa0 0x6c 0x39 0x20
+
+# CHECK: vpscatterdq %ymm28, 256(%r9,%xmm31) {%k1}
+0x62 0x02 0xfd 0x21 0xa0 0x64 0x39 0x20
+
+# CHECK: vpscatterqd %xmm22, 256(%r9,%xmm31) {%k1}
+0x62 0x82 0x7d 0x01 0xa1 0x74 0x39 0x40
+
+# CHECK: vpscatterqd %xmm24, 256(%r9,%ymm31) {%k1}
+0x62 0x02 0x7d 0x21 0xa1 0x44 0x39 0x40
+
+# CHECK: vpscatterqq %xmm28, 256(%r9,%xmm31) {%k1}
+0x62 0x02 0xfd 0x01 0xa1 0x64 0x39 0x20
+
+# CHECK: vpscatterqq %ymm19, 256(%r9,%ymm31) {%k1}
+0x62 0x82 0xfd 0x21 0xa1 0x5c 0x39 0x20
+
+# CHECK: vscatterdps %xmm20, 256(%r9,%xmm31) {%k1}
+0x62 0x82 0x7d 0x01 0xa2 0x64 0x39 0x40
+
+# CHECK: vscatterdps %ymm28, 256(%r9,%ymm31) {%k1}
+0x62 0x02 0x7d 0x21 0xa2 0x64 0x39 0x40
+
+# CHECK: vscatterdpd %xmm21, 256(%r9,%xmm31) {%k1}
+0x62 0x82 0xfd 0x01 0xa2 0x6c 0x39 0x20
+
+# CHECK: vscatterdpd %ymm28, 256(%r9,%xmm31) {%k1}
+0x62 0x02 0xfd 0x21 0xa2 0x64 0x39 0x20
+
+# CHECK: vscatterqps %xmm22, 256(%r9,%xmm31) {%k1}
+0x62 0x82 0x7d 0x01 0xa3 0x74 0x39 0x40
+
+# CHECK: vscatterqps %xmm24, 256(%r9,%ymm31) {%k1}
+0x62 0x02 0x7d 0x21 0xa3 0x44 0x39 0x40
+
+# CHECK: vscatterqpd %xmm28, 256(%r9,%xmm31) {%k1}
+0x62 0x02 0xfd 0x01 0xa3 0x64 0x39 0x20
+
+# CHECK: vscatterqpd %ymm19, 256(%r9,%ymm31) {%k1}
+0x62 0x82 0xfd 0x21 0xa3 0x5c 0x39 0x20
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