[PATCH] D28527: Check for register clobbers when merging a vreg live range with a reserved physreg in RegisterCoalescer.

[James Y Knight via Phabricator via llvm-commits]

jyknight added inline comments.


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Comment at: llvm/trunk/test/CodeGen/AArch64/regcoal-physreg.mir:78
+    ; Need a def of x18 so that it's not deduced as "constant".
+    %x18 = COPY %xzr
+    %7 = COPY %x18
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qcolombet wrote:
> You could use something else than x18 to avoid the !allocatable case that Matthias mentioned, right?
> What I am saying is that the comment is a bit misleading as it is, because this is expected when register are not allocatable.
The bug only exhibits for reserved registers in the first place (and only, then, if it is also clobbered by a call), so another register wouldn't be appropriate.


Repository:
  rL LLVM

https://reviews.llvm.org/D28527