[PATCH] D28744: [X86][AVX] Remove "OptForSize" condition from some memory foldings.

[Zvi Rackover via Phabricator via llvm-commits]

zvi added a comment.

LGTM, but please wait for an ok from other reviewers.



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Comment at: lib/Target/X86/X86InstrSSE.td:3457
 
-  // We don't want to fold scalar loads into these instructions unless
-  // optimizing for size. This is because the folded instruction will have a
-  // partial register update, while the unfolded sequence will not, e.g.
-  // vmovss mem, %xmm0
-  // vrcpss %xmm0, %xmm0, %xmm0
-  // which has a clobber before the rcp, vs.
-  // vrcpss mem, %xmm0, %xmm0
-  // TODO: In theory, we could fold the load, and avoid the stall caused by
-  // the partial register store, either in ExeDepFix or with smarter RA.
   let Predicates = [UseAVX] in {
    def : Pat<(OpNode RC:$src),  (!cast<Instruction>("V"#NAME#Suffix##r)
----------------
consider merging Predicates scope. You can do this as a NFC follow-up commit.


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Comment at: lib/Target/X86/X86InstrSSE.td:3460
                                 (ScalarVT (IMPLICIT_DEF)), RC:$src)>;
+
   }
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Is this extra line intentional?


https://reviews.llvm.org/D28744