[llvm] r291937 - [InstCombine] use 'match' and other clean-up; NFCI
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 13 10:52:11 PST 2017
Author: spatel
Date: Fri Jan 13 12:52:10 2017
New Revision: 291937
URL: http://llvm.org/viewvc/llvm-project?rev=291937&view=rev
Log:
[InstCombine] use 'match' and other clean-up; NFCI
Modified:
llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp
Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp?rev=291937&r1=291936&r2=291937&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp Fri Jan 13 12:52:10 2017
@@ -727,23 +727,14 @@ Instruction *InstCombiner::visitShl(Bina
if (match(Op1, m_APInt(ShAmtAPInt))) {
unsigned ShAmt = ShAmtAPInt->getZExtValue();
- // Turn:
- // %zext = zext i32 %V to i64
- // %res = shl i64 %V, 8
- //
- // Into:
- // %shl = shl i32 %V, 8
- // %res = zext i32 %shl to i64
- //
- // This is only valid if %V would have zeros shifted out.
- if (auto *ZI = dyn_cast<ZExtInst>(Op0)) {
- unsigned SrcBitWidth = ZI->getSrcTy()->getScalarSizeInBits();
- if (ShAmt < SrcBitWidth &&
- MaskedValueIsZero(ZI->getOperand(0),
- APInt::getHighBitsSet(SrcBitWidth, ShAmt), 0, &I)) {
- auto *Shl = Builder->CreateShl(ZI->getOperand(0), ShAmt);
- return new ZExtInst(Shl, I.getType());
- }
+ // shl (zext X), ShAmt --> zext (shl X, ShAmt)
+ // This is only valid if X would have zeros shifted out.
+ Value *X;
+ if (match(Op0, m_ZExt(m_Value(X)))) {
+ unsigned SrcWidth = X->getType()->getScalarSizeInBits();
+ if (ShAmt < SrcWidth &&
+ MaskedValueIsZero(X, APInt::getHighBitsSet(SrcWidth, ShAmt), 0, &I))
+ return new ZExtInst(Builder->CreateShl(X, ShAmt), I.getType());
}
// If the shifted-out value is known-zero, then this is a NUW shift.
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