[PATCH] D28673: [XRay][Arm32] Reduce the portion of the stub and implement more staging for tail calls - in LLVM
Serge Rogatch via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 13 06:46:15 PST 2017
rSerge updated this revision to Diff 84297.
rSerge added a comment.
Removed the changes fixing Arm32 XRay (as they are in a separate patch https://reviews.llvm.org/D28624 ).
https://reviews.llvm.org/D28673
Files:
lib/Target/ARM/ARMBaseInstrInfo.cpp
lib/Target/ARM/ARMBaseInstrInfo.h
Index: lib/Target/ARM/ARMBaseInstrInfo.h
===================================================================
--- lib/Target/ARM/ARMBaseInstrInfo.h
+++ lib/Target/ARM/ARMBaseInstrInfo.h
@@ -104,6 +104,8 @@
getNoopForMachoTarget(NopInst);
}
+ bool isTailCall(const MachineInstr &Inst) const override;
+
// Return the non-pre/post incrementing version of 'Opc'. Return 0
// if there is not such an opcode.
virtual unsigned getUnindexedOpcode(unsigned Opc) const =0;
Index: lib/Target/ARM/ARMBaseInstrInfo.cpp
===================================================================
--- lib/Target/ARM/ARMBaseInstrInfo.cpp
+++ lib/Target/ARM/ARMBaseInstrInfo.cpp
@@ -4623,6 +4623,19 @@
return Subtarget.getFeatureBits()[ARM::HasV6KOps];
}
+bool ARMBaseInstrInfo::isTailCall(const MachineInstr &Inst) const
+{
+ switch (Inst.getOpcode()) {
+ case ARM::TAILJMPd:
+ case ARM::TAILJMPr:
+ case ARM::TCRETURNdi:
+ case ARM::TCRETURNri:
+ return true;
+ default:
+ return false;
+ }
+}
+
bool ARMBaseInstrInfo::isSwiftFastImmShift(const MachineInstr *MI) const {
if (MI->getNumOperands() < 4)
return true;
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