[PATCH] D28198: [X86] Replace AND+IMM64 with SRL/SHL
Nikolai Bozhenov via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 12 12:05:32 PST 2017
This revision was automatically updated to reflect the committed changes.
Closed by commit rL291806: [X86] Replace AND+IMM64 with SRL/SHL (authored by n.bozhenov).
Changed prior to commit:
https://reviews.llvm.org/D28198?vs=84079&id=84162#toc
Repository:
rL LLVM
https://reviews.llvm.org/D28198
Files:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
llvm/trunk/test/CodeGen/X86/bypass-slow-division-64.ll
llvm/trunk/test/CodeGen/X86/bypass-slow-division-tune.ll
llvm/trunk/test/CodeGen/X86/cmp.ll
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