[PATCH] D23630: [PPC] Expand ISEL instruction into if-then-else sequence

[Tony Jiang via Phabricator via llvm-commits]

jtony updated this revision to Diff 83562.
jtony marked 8 inline comments as done.
jtony added a comment.

Address the comments from Kit and Nemanja.
Main changes are ：
（1）setting verifyAfter=true when adding pass. 
（2） fix some undefined physical register errors during verification, which is caused by when splitting one MBB into two, Regs defined in the first half is no longer visible to the second half. Need to add Regs defined in the first half as LiveIns of the second half. See lines 341-352 of file: lib/Target/PowerPC/PPCExpandISEL.cpp for details.


https://reviews.llvm.org/D23630

Files:
  lib/Target/PowerPC/CMakeLists.txt
  lib/Target/PowerPC/PPC.h
  lib/Target/PowerPC/PPCExpandISEL.cpp
  lib/Target/PowerPC/PPCISelDAGToDAG.cpp
  lib/Target/PowerPC/PPCISelLowering.cpp
  lib/Target/PowerPC/PPCInstrInfo.cpp
  lib/Target/PowerPC/PPCSubtarget.h
  lib/Target/PowerPC/PPCTargetMachine.cpp
  test/CodeGen/PowerPC/crbit-asm.ll
  test/CodeGen/PowerPC/crbits.ll
  test/CodeGen/PowerPC/expand-contiguous-isel.ll
  test/CodeGen/PowerPC/expand-isel-1.mir
  test/CodeGen/PowerPC/expand-isel-2.mir
  test/CodeGen/PowerPC/expand-isel-3.mir
  test/CodeGen/PowerPC/expand-isel-4.mir
  test/CodeGen/PowerPC/expand-isel-5.mir
  test/CodeGen/PowerPC/expand-isel-6.mir
  test/CodeGen/PowerPC/expand-isel-7.mir
  test/CodeGen/PowerPC/expand-isel-8.mir
  test/CodeGen/PowerPC/expand-isel.ll
  test/CodeGen/PowerPC/fold-zero.ll
  test/CodeGen/PowerPC/i1-ext-fold.ll
  test/CodeGen/PowerPC/i1-to-double.ll
  test/CodeGen/PowerPC/i64_fp_round.ll
  test/CodeGen/PowerPC/ifcvt.ll
  test/CodeGen/PowerPC/isel.ll
  test/CodeGen/PowerPC/optcmp.ll
  test/CodeGen/PowerPC/p8-isel-sched.ll
  test/CodeGen/PowerPC/ppc-crbits-onoff.ll
  test/CodeGen/PowerPC/select-i1-vs-i1.ll
  test/CodeGen/PowerPC/subreg-postra-2.ll
  test/CodeGen/PowerPC/subreg-postra.ll

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