[PATCH] D28196: [X86] Tune bypassing of slow division for Intel CPUs

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


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Comment at: lib/Target/X86/X86.td:214
                                      "HasSlowDivide64", "true",
-                                     "Use 16-bit divide for positive values less than 65536">;
+                                     "Use 32-bit divide for positive values less than 2^32">;
 def FeaturePadShortFunctions : SubtargetFeature<"pad-short-functions",
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Is losing the idivq-to-divw option likely to cause any problems to existing users?


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Comment at: test/CodeGen/X86/atom-bypass-slow-division-64.ll:3
+; RUN: llc < %s -mcpu=silvermont -march=x86-64 -asm-verbose=false | FileCheck %s
+; RUN: llc < %s -mcpu=skylake    -march=x86-64 -asm-verbose=false | FileCheck %s
 
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spatel wrote:
> Is there some reason to choose skylake here rather than sandybridge? If not, I'd prefer SNB because that's the oldest big core where the feature is applied?
Drop the -march and move the triple in there instead.


https://reviews.llvm.org/D28196