[PATCH] D28447: [X86][AVX512BW] Vectorize v64i8 vector shifts

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


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Comment at: lib/Target/X86/X86ISelLowering.cpp:21544
     auto SignBitSelect = [&](MVT SelVT, SDValue Sel, SDValue V0, SDValue V1) {
-      // On SSE41 targets we make use of the fact that VSELECT lowers
-      // to PBLENDVB which selects bytes based just on the sign bit.
-      if (Subtarget.hasSSE41()) {
+      if (Subtarget.hasBWI() && VT.is512BitVector()) {
+        // On AVX512BW targets we test for the sign bit by comparing to
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craig.topper wrote:
> Isn't hasBWI() already implied by the earlier if? Can a 512BitVector get here without BWI?
This is a legacy from some tests to try and get AVX512BWVL targets to use this as well for 128/256 cases - I'll clear it up. Incidently is it worth trying to use the vpmovw2m style instructions to extract the signbits into a mask instead of doing the comparison against zero?


Repository:
  rL LLVM

https://reviews.llvm.org/D28447