[PATCH] D28454: [AVX-512] Teach two address instruction pass to replace masked move instructions with blendm instructions when its beneficial.

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
craig.topper added reviewers: RKSimon, delena, zvi.
craig.topper added a subscriber: llvm-commits.

Isel now selects masked move instructions for vselect instead of blendm. But sometimes it beneficial to register allocation to remove the tied register constraint by using blendm instructions.

This also picks up cases where the masked move was created due to a masked load intrinsic.


https://reviews.llvm.org/D28454

Files:
  lib/Target/X86/X86InstrAVX512.td
  lib/Target/X86/X86InstrInfo.cpp
  test/CodeGen/X86/avx512-bugfix-26264.ll
  test/CodeGen/X86/avx512-masked-memop-64-32.ll
  test/CodeGen/X86/avx512-masked_memop-16-8.ll
  test/CodeGen/X86/avx512-regcall-NoMask.ll
  test/CodeGen/X86/avx512-vec-cmp.ll
  test/CodeGen/X86/avx512bw-vec-cmp.ll
  test/CodeGen/X86/avx512bwvl-vec-cmp.ll
  test/CodeGen/X86/avx512vl-vec-cmp.ll
  test/CodeGen/X86/masked_memop.ll
  test/CodeGen/X86/vector-shuffle-masked.ll

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