[llvm] r291149 - [CostModel][X86] Include the cost of 256-bit upper subvector extract/insertion in AVX1 v4i64 MUL

[Simon Pilgrim via llvm-commits]

Author: rksimon
Date: Thu Jan  5 12:20:25 2017
New Revision: 291149

URL: http://llvm.org/viewvc/llvm-project?rev=291149&view=rev
Log:
[CostModel][X86] Include the cost of 256-bit upper subvector extract/insertion in AVX1 v4i64 MUL

Matches other MUL/ADD/SUB 256-bit case on AVX1

Modified:
    llvm/trunk/lib/Target/X86/X86TargetTransformInfo.cpp
    llvm/trunk/test/Analysis/CostModel/X86/arith.ll

Modified: llvm/trunk/lib/Target/X86/X86TargetTransformInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetTransformInfo.cpp?rev=291149&r1=291148&r2=291149&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetTransformInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetTransformInfo.cpp Thu Jan  5 12:20:25 2017
@@ -556,9 +556,9 @@ int X86TTIImpl::getArithmeticInstrCost(
     // A v4i64 multiply is custom lowered as two split v2i64 vectors that then
     // are lowered as a series of long multiplies(3), shifts(3) and adds(2)
     // Because we believe v4i64 to be a legal type, we must also include the
-    // split factor of two in the cost table. Therefore, the cost here is 16
+    // extract+insert in the cost table. Therefore, the cost here is 18
     // instead of 8.
-    { ISD::MUL,     MVT::v4i64,    16 },
+    { ISD::MUL,     MVT::v4i64,    18 },
   };
 
   // Look for AVX1 lowering tricks.

Modified: llvm/trunk/test/Analysis/CostModel/X86/arith.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/CostModel/X86/arith.ll?rev=291149&r1=291148&r2=291149&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/CostModel/X86/arith.ll (original)
+++ llvm/trunk/test/Analysis/CostModel/X86/arith.ll Thu Jan  5 12:20:25 2017
@@ -436,7 +436,7 @@ define i32 @mul(i32 %arg) {
   %A = mul <2 x i64> undef, undef
   ; SSSE3: cost of 16 {{.*}} %B = mul
   ; SSE42: cost of 16 {{.*}} %B = mul
-  ; AVX: cost of 16 {{.*}} %B = mul
+  ; AVX: cost of 18 {{.*}} %B = mul
   ; AVX2: cost of 8 {{.*}} %B = mul
   ; AVX512F: cost of 8 {{.*}} %B = mul
   ; AVX512BW: cost of 8 {{.*}} %B = mul
@@ -444,7 +444,7 @@ define i32 @mul(i32 %arg) {
   %B = mul <4 x i64> undef, undef
   ; SSSE3: cost of 32 {{.*}} %C = mul
   ; SSE42: cost of 32 {{.*}} %C = mul
-  ; AVX: cost of 32 {{.*}} %C = mul
+  ; AVX: cost of 36 {{.*}} %C = mul
   ; AVX2: cost of 16 {{.*}} %C = mul
   ; AVX512F: cost of 8 {{.*}} %C = mul
   ; AVX512BW: cost of 8 {{.*}} %C = mul