[llvm] r291010 - [AArch64] Update the feature set for Qualcomm's Falkor CPU.

[Chad Rosier via llvm-commits]

Author: mcrosier
Date: Wed Jan  4 15:26:23 2017
New Revision: 291010

URL: http://llvm.org/viewvc/llvm-project?rev=291010&view=rev
Log:
[AArch64] Update the feature set for Qualcomm's Falkor CPU.

Modified:
    llvm/trunk/lib/Target/AArch64/AArch64.td
    llvm/trunk/test/CodeGen/AArch64/arm64-zero-cycle-zeroing.ll

Modified: llvm/trunk/lib/Target/AArch64/AArch64.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64.td?rev=291010&r1=291009&r2=291010&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64.td (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64.td Wed Jan  4 15:26:23 2017
@@ -264,9 +264,13 @@ def ProcFalkor  : SubtargetFeature<"falk
                                    "Qualcomm Falkor processors", [
                                    FeatureCRC,
                                    FeatureCrypto,
+                                   FeatureCustomCheapAsMoveHandling,
                                    FeatureFPARMv8,
                                    FeatureNEON,
-                                   FeaturePerfMon
+                                   FeaturePerfMon,
+                                   FeaturePostRAScheduler,
+                                   FeaturePredictableSelectIsExpensive,
+                                   FeatureZCZeroing
                                    ]>;
 
 def ProcVulcan  : SubtargetFeature<"vulcan", "ARMProcFamily", "Vulcan",

Modified: llvm/trunk/test/CodeGen/AArch64/arm64-zero-cycle-zeroing.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-zero-cycle-zeroing.ll?rev=291010&r1=291009&r2=291010&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/arm64-zero-cycle-zeroing.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/arm64-zero-cycle-zeroing.ll Wed Jan  4 15:26:23 2017
@@ -1,5 +1,6 @@
 ; RUN: llc -mtriple=arm64-apple-ios -mcpu=cyclone < %s | FileCheck %s -check-prefix=CYCLONE --check-prefix=ALL
 ; RUN: llc -mtriple=aarch64-gnu-linux -mcpu=kryo < %s | FileCheck %s -check-prefix=KRYO --check-prefix=ALL
+; RUN: llc -mtriple=aarch64-gnu-linux -mcpu=falkor < %s | FileCheck %s -check-prefix=FALKOR --check-prefix=ALL
 
 ; rdar://11481771
 ; rdar://13713797
@@ -16,6 +17,10 @@ entry:
 ; KRYO: movi v1.2d, #0000000000000000
 ; KRYO: movi v2.2d, #0000000000000000
 ; KRYO: movi v3.2d, #0000000000000000
+; FALKOR: movi v0.2d, #0000000000000000
+; FALKOR: movi v1.2d, #0000000000000000
+; FALKOR: movi v2.2d, #0000000000000000
+; FALKOR: movi v3.2d, #0000000000000000
   tail call void @bar(double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00) nounwind
   ret void
 }
@@ -47,6 +52,8 @@ define void @t4() nounwind ssp {
 ; CYCLONE: movi.2d v1, #0000000000000000
 ; KRYO: movi v0.2d, #0000000000000000
 ; KRYO: movi v1.2d, #0000000000000000
+; FALKOR: movi v0.2d, #0000000000000000
+; FALKOR: movi v1.2d, #0000000000000000
   tail call void @barf(float 0.000000e+00, float 0.000000e+00) nounwind
   ret void
 }