[PATCH] D28119: [InstCombine][X86] Add DemandedElts support for PMULDQ/PMULUDQ instructions

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: lib/Transforms/InstCombine/InstCombineCalls.cpp:1999
 
+  case Intrinsic::x86_sse2_pmulu_dq:
+  case Intrinsic::x86_sse41_pmuldq:
----------------
Can we just call SimplifyDemandedVectorElts on the Intrinsic node here with an all 1s demanded mask. This allows reuse of the code in InstCombineSimplifyDemanded. See the code at line 1879 in this file in this diff.




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Comment at: lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp:1459
+                                        Depth + 1);
+      if (TmpV) { II->setArgOperand(1, TmpV); MadeChange = true; }
+
----------------
Why is this code formatted differently than the same code for ArgOperand 0?


Repository:
  rL LLVM

https://reviews.llvm.org/D28119