[llvm] r290387 - [GlobalISel] More fix for the size vs. type typo. NFC.
Quentin Colombet via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 22 14:50:34 PST 2016
Author: qcolombet
Date: Thu Dec 22 16:50:34 2016
New Revision: 290387
URL: http://llvm.org/viewvc/llvm-project?rev=290387&view=rev
Log:
[GlobalISel] More fix for the size vs. type typo. NFC.
I missed those in my previous commit (r290378).
Modified:
llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp
llvm/trunk/lib/CodeGen/MachineVerifier.cpp
llvm/trunk/test/CodeGen/MIR/AArch64/generic-virtual-registers-error.mir
llvm/trunk/test/CodeGen/MIR/AArch64/generic-virtual-registers-with-regbank-error.mir
Modified: llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp?rev=290387&r1=290386&r2=290387&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp (original)
+++ llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp Thu Dec 22 16:50:34 2016
@@ -1042,12 +1042,12 @@ bool MIParser::parseRegisterOperand(Mach
MRI.setType(Reg, Ty);
} else if (TargetRegisterInfo::isVirtualRegister(Reg)) {
- // Generic virtual registers must have a size.
- // If we end up here this means the size hasn't been specified and
+ // Generic virtual registers must have a type.
+ // If we end up here this means the type hasn't been specified and
// this is bad!
if (RegInfo->Kind == VRegInfo::GENERIC ||
RegInfo->Kind == VRegInfo::REGBANK)
- return error("generic virtual registers must have a size");
+ return error("generic virtual registers must have a type");
}
Dest = MachineOperand::CreateReg(
Reg, Flags & RegState::Define, Flags & RegState::Implicit,
Modified: llvm/trunk/lib/CodeGen/MachineVerifier.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineVerifier.cpp?rev=290387&r1=290386&r2=290387&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineVerifier.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineVerifier.cpp Thu Dec 22 16:50:34 2016
@@ -1023,7 +1023,7 @@ MachineVerifier::visitMachineOperand(con
return;
}
- // The gvreg must have a size and it must not have a SubIdx.
+ // The gvreg must have a type and it must not have a SubIdx.
LLT Ty = MRI->getType(Reg);
if (!Ty.isValid()) {
report("Generic virtual register must have a valid type", MO,
Modified: llvm/trunk/test/CodeGen/MIR/AArch64/generic-virtual-registers-error.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/AArch64/generic-virtual-registers-error.mir?rev=290387&r1=290386&r2=290387&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/AArch64/generic-virtual-registers-error.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/AArch64/generic-virtual-registers-error.mir Thu Dec 22 16:50:34 2016
@@ -15,7 +15,7 @@ registers:
body: |
bb.0:
liveins: %w0
- ; ERR: generic virtual registers must have a size
+ ; ERR: generic virtual registers must have a type
; ERR-NEXT: %0
; ERR: Unable to initialize machine function
%0 = G_ADD i32 %w0, %w0
Modified: llvm/trunk/test/CodeGen/MIR/AArch64/generic-virtual-registers-with-regbank-error.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/AArch64/generic-virtual-registers-with-regbank-error.mir?rev=290387&r1=290386&r2=290387&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/AArch64/generic-virtual-registers-with-regbank-error.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/AArch64/generic-virtual-registers-with-regbank-error.mir Thu Dec 22 16:50:34 2016
@@ -16,7 +16,7 @@ registers:
body: |
bb.0:
liveins: %w0
- ; ERR: generic virtual registers must have a size
+ ; ERR: generic virtual registers must have a type
; ERR-NEXT: %0
; ERR: Unable to initialize machine function
%0 = G_ADD i32 %w0, %w0
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