[llvm] r290183 - [X86][SSE] Ensure we're only combining shuffles with legal mask types.
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 20 09:09:53 PST 2016
Author: rksimon
Date: Tue Dec 20 11:09:52 2016
New Revision: 290183
URL: http://llvm.org/viewvc/llvm-project?rev=290183&view=rev
Log:
[X86][SSE] Ensure we're only combining shuffles with legal mask types.
I haven't managed to get this to fail yet but its technically possible for the AND -> shuffle decomposition to result in illegal types.
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=290183&r1=290182&r2=290183&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Dec 20 11:09:52 2016
@@ -26460,6 +26460,10 @@ static bool combineX86ShuffleChain(Array
: MVT::getIntegerVT(MaskEltSizeInBits);
MaskVT = MVT::getVectorVT(MaskVT, NumMaskElts);
+ // Only allow legal mask types.
+ if (!DAG.getTargetLoweringInfo().isTypeLegal(MaskVT))
+ return false;
+
// Attempt to match the mask against known shuffle patterns.
MVT ShuffleSrcVT, ShuffleVT;
unsigned Shuffle, PermuteImm;
More information about the llvm-commits
mailing list