[PATCH] D27953: [AArch64][AsmParser] Add support for parsing shift/extend operands with symbols.

[Chad Rosier via Phabricator via llvm-commits]

mcrosier created this revision.
mcrosier added reviewers: grosbach, t.p.northover, ab, rengolin, gberry, jmolloy, MatzeB.
mcrosier added a subscriber: llvm-commits.
Herald added a subscriber: aemerson.

This commit allows symbols defined with the .equ/.set directive to be used as shift/extend operands for AArch64.  E.g.,

  .set IMM2, 2
  .equ IMM4, 4
  
  add w1, w2, w3, uxtb #IMM2
  add w4, w5, w6, uxth #IMM4

This addresses PR31431.

PTAL,

  Chad


https://reviews.llvm.org/D27953

Files:
  lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
  test/MC/AArch64/shift_extend_op_w_symbol.s


Index: test/MC/AArch64/shift_extend_op_w_symbol.s
===================================================================
--- /dev/null
+++ test/MC/AArch64/shift_extend_op_w_symbol.s
@@ -0,0 +1,34 @@
+// RUN: llvm-mc -triple aarch64-none-linux-gnu < %s | FileCheck %s
+  .globl _func
+
+_func:
+// CHECK-LABEL: _func
+
+        .set IMM2, 2
+        .equ IMM4, 4
+
+// Make sure we can use a symbol with the optionally shift left operand.
+
+        add w1, w2, w3, uxtb #IMM2
+        add w4, w5, w6, uxth #IMM4
+        add x7, x8, x9, lsl #IMM2
+        add w7, w8, w9, uxtw #IMM4
+        add x1, x2, x3, uxtx #IMM4
+
+// CHECK: add w1, w2, w3, uxtb #2
+// CHECK: add w4, w5, w6, uxth #4
+// CHECK: add x7, x8, x9, lsl #2
+// CHECK: add w7, w8, w9, uxtw #4
+// CHECK: add x1, x2, x3, uxtx #4
+
+        add w1, w2, w3, sxtb #IMM2
+        add w4, w5, w6, sxth #IMM4
+        add x7, x8, x9, lsl #IMM2
+        add w7, w8, w9, sxtw #IMM2
+        add x1, x2, x3, sxtx #IMM4
+
+// CHECK: add w1, w2, w3, sxtb #2
+// CHECK: add w4, w5, w6, sxth #4
+// CHECK: add x7, x8, x9, lsl #2
+// CHECK: add w7, w8, w9, sxtw #2
+// CHECK: add x1, x2, x3, sxtx #4
Index: lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
===================================================================
--- lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -2406,17 +2406,19 @@
       return MatchOperand_ParseFail;
     }
 
-    // "extend" type operatoins don't need an immediate, #0 is implicit.
+    // "extend" type operations don't need an immediate, #0 is implicit.
     SMLoc E = SMLoc::getFromPointer(getLoc().getPointer() - 1);
     Operands.push_back(
         AArch64Operand::CreateShiftExtend(ShOp, 0, false, S, E, getContext()));
     return MatchOperand_Success;
   }
 
-  // Make sure we do actually have a number or a parenthesized expression.
+  // Make sure we do actually have a number, identifier or a parenthesized
+  // expression.
   SMLoc E = Parser.getTok().getLoc();
   if (!Parser.getTok().is(AsmToken::Integer) &&
-      !Parser.getTok().is(AsmToken::LParen)) {
+      !Parser.getTok().is(AsmToken::LParen) &&
+      !Parser.getTok().is(AsmToken::Identifier)) {
     Error(E, "expected integer shift amount");
     return MatchOperand_ParseFail;
   }


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