[llvm] r289717 - [asan] Hook ClInstrumentWrites and ClInstrumentReads to masked operation instrumentation.

Filipe Cabecinhas via llvm-commits llvm-commits at lists.llvm.org
Wed Dec 14 13:56:59 PST 2016 

Author: filcab
Date: Wed Dec 14 15:56:59 2016
New Revision: 289717

URL: http://llvm.org/viewvc/llvm-project?rev=289717&view=rev
Log:
[asan] Hook ClInstrumentWrites and ClInstrumentReads to masked operation instrumentation.

Reviewers: kcc

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D27548

Modified:
    llvm/trunk/lib/Transforms/Instrumentation/AddressSanitizer.cpp
    llvm/trunk/test/Instrumentation/AddressSanitizer/asan-masked-load-store.ll

Modified: llvm/trunk/lib/Transforms/Instrumentation/AddressSanitizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Instrumentation/AddressSanitizer.cpp?rev=289717&r1=289716&r2=289717&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Instrumentation/AddressSanitizer.cpp (original)
+++ llvm/trunk/lib/Transforms/Instrumentation/AddressSanitizer.cpp Wed Dec 14 15:56:59 2016
@@ -1046,10 +1046,14 @@ Value *AddressSanitizer::isInterestingMe
               F->getName().startswith("llvm.masked.store."))) {
       unsigned OpOffset = 0;
       if (F->getName().startswith("llvm.masked.store.")) {
+        if (!ClInstrumentWrites)
+          return nullptr;
         // Masked store has an initial operand for the value.
         OpOffset = 1;
         *IsWrite = true;
       } else {
+        if (!ClInstrumentReads)
+          return nullptr;
         *IsWrite = false;
       }
       // Only instrument if the mask is constant for now.

Modified: llvm/trunk/test/Instrumentation/AddressSanitizer/asan-masked-load-store.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Instrumentation/AddressSanitizer/asan-masked-load-store.ll?rev=289717&r1=289716&r2=289717&view=diff
==============================================================================
--- llvm/trunk/test/Instrumentation/AddressSanitizer/asan-masked-load-store.ll (original)
+++ llvm/trunk/test/Instrumentation/AddressSanitizer/asan-masked-load-store.ll Wed Dec 14 15:56:59 2016
@@ -1,4 +1,11 @@
-; RUN: opt < %s -asan -asan-instrumentation-with-call-threshold=0 -S | FileCheck %s -check-prefix=LOAD -check-prefix=STORE -check-prefix=BOTH
+; RUN: opt < %s -asan -asan-instrumentation-with-call-threshold=0 -S \
+; RUN:     | FileCheck %s -check-prefix=LOAD -check-prefix=STORE -check-prefix=ALL
+; RUN: opt < %s -asan -asan-instrumentation-with-call-threshold=0 -asan-instrument-reads=0 -S \
+; RUN:     | FileCheck %s -check-prefix=NOLOAD -check-prefix=STORE -check-prefix=ALL
+; RUN: opt < %s -asan -asan-instrumentation-with-call-threshold=0 -asan-instrument-writes=0 -S \
+; RUN:     | FileCheck %s -check-prefix=LOAD -check-prefix=NOSTORE -check-prefix=ALL
+; RUN: opt < %s -asan -asan-instrumentation-with-call-threshold=0 -asan-instrument-reads=0 -asan-instrument-writes=0 -S \
+; RUN:     | FileCheck %s -check-prefix=NOLOAD -check-prefix=NOSTORE -check-prefix=ALL
 ; Support ASan instrumentation for constant-mask llvm.masked.{load,store}
 
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
@@ -13,8 +20,9 @@ declare void @llvm.masked.store.v8i32.p0
 declare void @llvm.masked.store.v4p0i32.p0v4p0i32(<4 x i32*>, <4 x i32*>*, i32, <4 x i1>) argmemonly nounwind
 
 define void @store.v4f32.1110(<4 x float> %arg) sanitize_address {
-; BOTH-LABEL: @store.v4f32.1110
+; ALL-LABEL: @store.v4f32.1110
   %p = load <4 x float>*, <4 x float>** @v4f32, align 8
+; NOSTORE-NOT: call void @__asan_store
 ; STORE: [[GEP0:%[0-9A-Za-z]+]] = getelementptr <4 x float>, <4 x float>* %p, i64 0, i64 0
 ; STORE: [[PGEP0:%[0-9A-Za-z]+]] = ptrtoint float* [[GEP0]] to i64
 ; STORE: call void @__asan_store4(i64 [[PGEP0]])
@@ -30,8 +38,9 @@ define void @store.v4f32.1110(<4 x float
 }
 
 define void @store.v8i32.10010110(<8 x i32> %arg) sanitize_address {
-; BOTH-LABEL: @store.v8i32.10010110
+; ALL-LABEL: @store.v8i32.10010110
   %p = load <8 x i32>*, <8 x i32>** @v8i32, align 8
+; NOSTORE-NOT: call void @__asan_store
 ; STORE: [[GEP0:%[0-9A-Za-z]+]] = getelementptr <8 x i32>, <8 x i32>* %p, i64 0, i64 0
 ; STORE: [[PGEP0:%[0-9A-Za-z]+]] = ptrtoint i32* [[GEP0]] to i64
 ; STORE: call void @__asan_store4(i64 [[PGEP0]])
@@ -50,8 +59,9 @@ define void @store.v8i32.10010110(<8 x i
 }
 
 define void @store.v4i64.0001(<4 x i32*> %arg) sanitize_address {
-; BOTH-LABEL: @store.v4i64.0001
+; ALL-LABEL: @store.v4i64.0001
   %p = load <4 x i32*>*, <4 x i32*>** @v4i64, align 8
+; NOSTORE-NOT: call void @__asan_store
 ; STORE: [[GEP3:%[0-9A-Za-z]+]] = getelementptr <4 x i32*>, <4 x i32*>* %p, i64 0, i64 3
 ; STORE: [[PGEP3:%[0-9A-Za-z]+]] = ptrtoint i32** [[GEP3]] to i64
 ; STORE: call void @__asan_store8(i64 [[PGEP3]])
@@ -61,9 +71,9 @@ define void @store.v4i64.0001(<4 x i32*>
 }
 
 define void @store.v4f32.variable(<4 x float> %arg, <4 x i1> %mask) sanitize_address {
-; BOTH-LABEL: @store.v4f32.variable
+; ALL-LABEL: @store.v4f32.variable
   %p = load <4 x float>*, <4 x float>** @v4f32, align 8
-; BOTH-NOT: call void @__asan_store
+; ALL-NOT: call void @__asan_store
   tail call void @llvm.masked.store.v4f32.p0v4f32(<4 x float> %arg, <4 x float>* %p, i32 4, <4 x i1> %mask)
   ret void
 }
@@ -74,8 +84,9 @@ declare <8 x i32> @llvm.masked.load.v8i3
 declare <4 x i32*> @llvm.masked.load.v4p0i32.p0v4p0i32(<4 x i32*>*, i32, <4 x i1>, <4 x i32*>) argmemonly nounwind
 
 define <8 x i32> @load.v8i32.11100001(<8 x i32> %arg) sanitize_address {
-; BOTH-LABEL: @load.v8i32.11100001
+; ALL-LABEL: @load.v8i32.11100001
   %p = load <8 x i32>*, <8 x i32>** @v8i32, align 8
+; NOLOAD-NOT: call void @__asan_load
 ; LOAD: [[GEP0:%[0-9A-Za-z]+]] = getelementptr <8 x i32>, <8 x i32>* %p, i64 0, i64 0
 ; LOAD: [[PGEP0:%[0-9A-Za-z]+]] = ptrtoint i32* [[GEP0]] to i64
 ; LOAD: call void @__asan_load4(i64 [[PGEP0]])
@@ -94,8 +105,9 @@ define <8 x i32> @load.v8i32.11100001(<8
 }
 
 define <4 x float> @load.v4f32.1001(<4 x float> %arg) sanitize_address {
-; BOTH-LABEL: @load.v4f32.1001
+; ALL-LABEL: @load.v4f32.1001
   %p = load <4 x float>*, <4 x float>** @v4f32, align 8
+; NOLOAD-NOT: call void @__asan_load
 ; LOAD: [[GEP0:%[0-9A-Za-z]+]] = getelementptr <4 x float>, <4 x float>* %p, i64 0, i64 0
 ; LOAD: [[PGEP0:%[0-9A-Za-z]+]] = ptrtoint float* [[GEP0]] to i64
 ; LOAD: call void @__asan_load4(i64 [[PGEP0]])
@@ -108,8 +120,9 @@ define <4 x float> @load.v4f32.1001(<4 x
 }
 
 define <4 x i32*> @load.v4i64.0001(<4 x i32*> %arg) sanitize_address {
-; BOTH-LABEL: @load.v4i64.0001
+; ALL-LABEL: @load.v4i64.0001
   %p = load <4 x i32*>*, <4 x i32*>** @v4i64, align 8
+; NOLOAD-NOT: call void @__asan_load
 ; LOAD: [[GEP3:%[0-9A-Za-z]+]] = getelementptr <4 x i32*>, <4 x i32*>* %p, i64 0, i64 3
 ; LOAD: [[PGEP3:%[0-9A-Za-z]+]] = ptrtoint i32** [[GEP3]] to i64
 ; LOAD: call void @__asan_load8(i64 [[PGEP3]])
@@ -119,9 +132,9 @@ define <4 x i32*> @load.v4i64.0001(<4 x
 }
 
 define <4 x float> @load.v4f32.variable(<4 x float> %arg, <4 x i1> %mask) sanitize_address {
-; BOTH-LABEL: @load.v4f32.variable
+; ALL-LABEL: @load.v4f32.variable
   %p = load <4 x float>*, <4 x float>** @v4f32, align 8
-; BOTH-NOT: call void @__asan_load
+; ALL-NOT: call void @__asan_load
   %res = tail call <4 x float> @llvm.masked.load.v4f32.p0v4f32(<4 x float>* %p, i32 4, <4 x i1> %mask, <4 x float> %arg)
   ret <4 x float> %res
 }

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