[PATCH] D27756: [X86][SSE] Improve lowering of vXi64 multiplies

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon created this revision.
RKSimon added reviewers: mkuper, eli.friedman, sroland, spatel, andreadb.
RKSimon added a subscriber: llvm-commits.
RKSimon set the repository for this revision to rL LLVM.

As mentioned on PR30845, we were performing our vXi64 multiplication as:

  AloBlo = pmuludq(a, b);
  AloBhi = pmuludq(a, psrlqi(b, 32));
  AhiBlo = pmuludq(psrlqi(a, 32), b);
  return AloBlo + psllqi(AloBhi, 32)+ psllqi(AhiBlo, 32);

when we could avoid one of the upper shifts with:

  AloBlo = pmuludq(a, b);
  AloBhi = pmuludq(a, psrlqi(b, 32));
  AhiBlo = pmuludq(psrlqi(a, 32), b);
  return AloBlo + psllqi(AloBhi + AhiBlo, 32);

This matches the lowering on gcc/icc.


Repository:
  rL LLVM

https://reviews.llvm.org/D27756

Files:
  lib/Target/X86/X86ISelLowering.cpp
  lib/Target/X86/X86TargetTransformInfo.cpp
  test/Analysis/CostModel/X86/arith.ll
  test/CodeGen/X86/avx-arith.ll
  test/CodeGen/X86/avx512-arith.ll
  test/CodeGen/X86/combine-mul.ll
  test/CodeGen/X86/pmul.ll
  test/CodeGen/X86/shrink_vmul.ll
  test/CodeGen/X86/vector-trunc-math.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D27756.81382.patch
Type: text/x-patch
Size: 61748 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20161214/55511e89/attachment.bin>