[llvm] r289620 - [DWARF] Preserve column number when emitting 'line 0' record
Paul Robinson via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 13 16:27:36 PST 2016
Author: probinson
Date: Tue Dec 13 18:27:35 2016
New Revision: 289620
URL: http://llvm.org/viewvc/llvm-project?rev=289620&view=rev
Log:
[DWARF] Preserve column number when emitting 'line 0' record
Follow-up to r289256, address a FIXME to avoid resetting the column
number. This reduced .debug_line by 2.6% in a RelWithDebInfo
self-build of clang.
Modified:
llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
llvm/trunk/test/CodeGen/X86/unknown-location.ll
llvm/trunk/test/DebugInfo/X86/dwarf-no-source-loc.ll
llvm/trunk/test/DebugInfo/X86/tail-merge.ll
Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp?rev=289620&r1=289619&r2=289620&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp (original)
+++ llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp Tue Dec 13 18:27:35 2016
@@ -1048,11 +1048,16 @@ void DwarfDebug::beginInstruction(const
// location from the physically previous (maybe unrelated) block.
if (UnknownLocations == Enable || PrevLabel ||
(PrevInstBB && PrevInstBB != MI->getParent())) {
- // Preserve the file number, if we can, to save space in the line table.
+ // Preserve the file and column numbers, if we can, to save space in
+ // the encoded line table.
// Do not update PrevInstLoc, it remembers the last non-0 line.
- // FIXME: Also preserve the column number, to save more space?
- const MDNode *Scope = PrevInstLoc ? PrevInstLoc.getScope() : nullptr;
- recordSourceLine(0, 0, Scope, 0);
+ const MDNode *Scope = nullptr;
+ unsigned Column = 0;
+ if (PrevInstLoc) {
+ Scope = PrevInstLoc.getScope();
+ Column = PrevInstLoc.getCol();
+ }
+ recordSourceLine(/*Line=*/0, Column, Scope, /*Flags=*/0);
}
return;
}
Modified: llvm/trunk/test/CodeGen/X86/unknown-location.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/unknown-location.ll?rev=289620&r1=289619&r2=289620&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/unknown-location.ll (original)
+++ llvm/trunk/test/CodeGen/X86/unknown-location.ll Tue Dec 13 18:27:35 2016
@@ -1,11 +1,10 @@
; RUN: llc < %s -asm-verbose=false -mtriple=x86_64-apple-darwin10 -use-unknown-locations=Enable | FileCheck %s
; The divide instruction does not have a debug location. CodeGen should
-; represent this in the debug information. This is done by setting line
-; and column to 0
+; represent this in the debug information. This is done by setting line to 0.
; CHECK: leal
-; CHECK-NEXT: .loc 1 0 0
+; CHECK-NEXT: .loc 1 0 3
; CHECK: cltd
; CHECK-NEXT: idivl
; CHECK-NEXT: .loc 1 4 3
Modified: llvm/trunk/test/DebugInfo/X86/dwarf-no-source-loc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/dwarf-no-source-loc.ll?rev=289620&r1=289619&r2=289620&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/dwarf-no-source-loc.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/dwarf-no-source-loc.ll Tue Dec 13 18:27:35 2016
@@ -42,11 +42,11 @@ if.end:
; CHECK: .loc 1 7 7
; CHECK-NOT: .loc
-; CHECK: .loc 1 0 0 is_stmt 0
+; CHECK: .loc 1 0 7 is_stmt 0
; CHECK-NOT: .loc
; CHECK: .loc 2 20 5 is_stmt 1
; CHECK: .LBB0_2:
-; CHECK-NEXT: .loc 2 0 0 is_stmt 0
+; CHECK-NEXT: .loc 2 0 5 is_stmt 0
; CHECK-NOT: .loc
; CHECK: .loc 1 10 3 is_stmt 1
;
Modified: llvm/trunk/test/DebugInfo/X86/tail-merge.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/tail-merge.ll?rev=289620&r1=289619&r2=289620&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/tail-merge.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/tail-merge.ll Tue Dec 13 18:27:35 2016
@@ -27,7 +27,7 @@
; CHECK: .loc 1 8 10
; CHECK: callq bar
; CHECK: [[TAIL]]:
-; CHECK: .loc 1 0 0
+; CHECK: .loc 1 0
; CHECK: addl [[REG]], %eax
; CHECK: .loc 1 9 3
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