[llvm] r289370 - [AVX-512][InstCombine] Teach InstCombineCalls how to simplify demanded elements for scalar add, div, mul, sub, max, min intrinsics with masking and rounding.

[Chandler Carruth via llvm-commits]

No test case?

On Sat, Dec 10, 2016 at 11:52 PM Craig Topper via llvm-commits <
llvm-commits at lists.llvm.org> wrote:

> Author: ctopper
> Date: Sun Dec 11 01:42:01 2016
> New Revision: 289370
>
> URL: http://llvm.org/viewvc/llvm-project?rev=289370&view=rev
> Log:
> [AVX-512][InstCombine] Teach InstCombineCalls how to simplify demanded
> elements for scalar add,div,mul,sub,max,min intrinsics with masking and
> rounding.
>
> These intrinsics don't read the upper bits of their second input. And the
> third input is the passthru for masking and that only uses the lower
> element as well.
>
> Modified:
>     llvm/trunk/lib/Transforms/InstCombine/InstCombineCalls.cpp
>
> Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCalls.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineCalls.cpp?rev=289370&r1=289369&r2=289370&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Transforms/InstCombine/InstCombineCalls.cpp (original)
> +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineCalls.cpp Sun Dec 11
> 01:42:01 2016
> @@ -1775,6 +1775,37 @@ Instruction *InstCombiner::visitCallInst
>      break;
>    }
>
> +  case Intrinsic::x86_avx512_mask_add_ss_round:
> +  case Intrinsic::x86_avx512_mask_div_ss_round:
> +  case Intrinsic::x86_avx512_mask_mul_ss_round:
> +  case Intrinsic::x86_avx512_mask_sub_ss_round:
> +  case Intrinsic::x86_avx512_mask_max_ss_round:
> +  case Intrinsic::x86_avx512_mask_min_ss_round:
> +  case Intrinsic::x86_avx512_mask_add_sd_round:
> +  case Intrinsic::x86_avx512_mask_div_sd_round:
> +  case Intrinsic::x86_avx512_mask_mul_sd_round:
> +  case Intrinsic::x86_avx512_mask_sub_sd_round:
> +  case Intrinsic::x86_avx512_mask_max_sd_round:
> +  case Intrinsic::x86_avx512_mask_min_sd_round: {
> +    // These intrinsics only demand the lowest element of the second and
> third
> +    // input vector.
> +    bool MadeChange = false;
> +    Value *Arg1 = II->getArgOperand(1);
> +    Value *Arg2 = II->getArgOperand(2);
> +    unsigned VWidth = Arg1->getType()->getVectorNumElements();
> +    if (Value *V = SimplifyDemandedVectorEltsLow(Arg1, VWidth, 1)) {
> +      II->setArgOperand(1, V);
> +      MadeChange = true;
> +    }
> +    if (Value *V = SimplifyDemandedVectorEltsLow(Arg2, VWidth, 1)) {
> +      II->setArgOperand(2, V);
> +      MadeChange = true;
> +    }
> +    if (MadeChange)
> +      return II;
> +    break;
> +  }
> +
>    case Intrinsic::x86_sse41_round_ss:
>    case Intrinsic::x86_sse41_round_sd: {
>      // These intrinsics demand the upper elements of the first input
> vector and
>
>
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