[llvm] r289323 - [AVR] Fix an inline asm assertion which would always trigger

[Roel Jordans via llvm-commits]

I guess you would also want to update the comment here?


On 10-12-16 12:18, Dylan McKay via llvm-commits wrote:
> Author: dylanmckay
> Date: Sat Dec 10 05:18:37 2016
> New Revision: 289323
>
> URL: http://llvm.org/viewvc/llvm-project?rev=289323&view=rev
> Log:
> [AVR] Fix an inline asm assertion which would always trigger
>
> It looks like some time in the past, constraint codes were changed from
> chars being passed around to enums.
>
> Modified:
>      llvm/trunk/lib/Target/AVR/AVRISelDAGToDAG.cpp
>
> Modified: llvm/trunk/lib/Target/AVR/AVRISelDAGToDAG.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AVR/AVRISelDAGToDAG.cpp?rev=289323&r1=289322&r2=289323&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/AVR/AVRISelDAGToDAG.cpp (original)
> +++ llvm/trunk/lib/Target/AVR/AVRISelDAGToDAG.cpp Sat Dec 10 05:18:37 2016
> @@ -205,7 +205,7 @@ bool AVRDAGToDAGISel::SelectInlineAsmMem
>                                                      std::vector<SDValue> &OutOps) {
>     // Yes hardcoded 'm' symbol. Just because it also has been hardcoded in
>     // SelectionDAGISel (callee for this method).
> -  assert(ConstraintCode == 'm' && "Unexpected asm memory constraint");
> +  assert(ConstraintCode == InlineAsm::Constraint_m && "Unexpected asm memory constraint");
>   
>     MachineRegisterInfo &RI = MF->getRegInfo();
>     const AVRSubtarget &STI = MF->getSubtarget<AVRSubtarget>();
>
>
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